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https://github.com/c64scene-ar/llvm-6502.git
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8a8d479214
change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
257 lines
9.7 KiB
C++
257 lines
9.7 KiB
C++
//===-- SPUTargetMachine.cpp - Define TargetMachine for Cell SPU ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Top-level implementation for the Cell SPU target.
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//
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//===----------------------------------------------------------------------===//
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#include "SPU.h"
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#include "SPUFrameLowering.h"
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#include "SPUInstrBuilder.h"
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#include "SPUInstrInfo.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/RegisterScavenging.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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// SPUFrameLowering:
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//===----------------------------------------------------------------------===//
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SPUFrameLowering::SPUFrameLowering(const SPUSubtarget &sti)
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 16, 0),
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Subtarget(sti) {
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LR[0].first = SPU::R0;
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LR[0].second = 16;
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}
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//--------------------------------------------------------------------------
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// hasFP - Return true if the specified function actually has a dedicated frame
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// pointer register. This is true if the function needs a frame pointer and has
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// a non-zero stack size.
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bool SPUFrameLowering::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return MFI->getStackSize() &&
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(MF.getTarget().Options.DisableFramePointerElim(MF) ||
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MFI->hasVarSizedObjects());
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}
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/// determineFrameLayout - Determine the size of the frame and maximum call
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/// frame size.
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void SPUFrameLowering::determineFrameLayout(MachineFunction &MF) const {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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// Get the number of bytes to allocate from the FrameInfo
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unsigned FrameSize = MFI->getStackSize();
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// Get the alignments provided by the target, and the maximum alignment
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// (if any) of the fixed frame objects.
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unsigned TargetAlign = getStackAlignment();
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unsigned Align = std::max(TargetAlign, MFI->getMaxAlignment());
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assert(isPowerOf2_32(Align) && "Alignment is not power of 2");
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unsigned AlignMask = Align - 1;
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// Get the maximum call frame size of all the calls.
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unsigned maxCallFrameSize = MFI->getMaxCallFrameSize();
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// If we have dynamic alloca then maxCallFrameSize needs to be aligned so
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// that allocations will be aligned.
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if (MFI->hasVarSizedObjects())
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maxCallFrameSize = (maxCallFrameSize + AlignMask) & ~AlignMask;
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// Update maximum call frame size.
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MFI->setMaxCallFrameSize(maxCallFrameSize);
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// Include call frame size in total.
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FrameSize += maxCallFrameSize;
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// Make sure the frame is aligned.
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FrameSize = (FrameSize + AlignMask) & ~AlignMask;
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// Update frame info.
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MFI->setStackSize(FrameSize);
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}
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void SPUFrameLowering::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
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MachineBasicBlock::iterator MBBI = MBB.begin();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const SPUInstrInfo &TII =
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*static_cast<const SPUInstrInfo*>(MF.getTarget().getInstrInfo());
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MachineModuleInfo &MMI = MF.getMMI();
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DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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// Prepare for debug frame info.
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bool hasDebugInfo = MMI.hasDebugInfo();
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MCSymbol *FrameLabel = 0;
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// Move MBBI back to the beginning of the function.
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MBBI = MBB.begin();
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// Work out frame sizes.
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determineFrameLayout(MF);
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int FrameSize = MFI->getStackSize();
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assert((FrameSize & 0xf) == 0
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&& "SPURegisterInfo::emitPrologue: FrameSize not aligned");
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// the "empty" frame size is 16 - just the register scavenger spill slot
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if (FrameSize > 16 || MFI->adjustsStack()) {
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FrameSize = -(FrameSize + SPUFrameLowering::minStackSize());
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if (hasDebugInfo) {
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// Mark effective beginning of when frame pointer becomes valid.
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FrameLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl, TII.get(SPU::PROLOG_LABEL)).addSym(FrameLabel);
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}
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// Adjust stack pointer, spilling $lr -> 16($sp) and $sp -> -FrameSize($sp)
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// for the ABI
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BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R0).addImm(16)
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.addReg(SPU::R1);
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if (isInt<10>(FrameSize)) {
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// Spill $sp to adjusted $sp
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BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize)
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.addReg(SPU::R1);
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// Adjust $sp by required amout
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BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1)
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.addImm(FrameSize);
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} else if (isInt<16>(FrameSize)) {
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// Frame size can be loaded into ILr32n, so temporarily spill $r2 and use
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// $r2 to adjust $sp:
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BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2)
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.addImm(-16)
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.addReg(SPU::R1);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::ILr32), SPU::R2)
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.addImm(FrameSize);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::STQXr32), SPU::R1)
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.addReg(SPU::R2)
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.addReg(SPU::R1);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::Ar32), SPU::R1)
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.addReg(SPU::R1)
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.addReg(SPU::R2);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::SFIr32), SPU::R2)
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.addReg(SPU::R2)
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.addImm(16);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::LQXr128), SPU::R2)
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.addReg(SPU::R2)
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.addReg(SPU::R1);
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} else {
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report_fatal_error("Unhandled frame size: " + Twine(FrameSize));
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}
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if (hasDebugInfo) {
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std::vector<MachineMove> &Moves = MMI.getFrameMoves();
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// Show update of SP.
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MachineLocation SPDst(MachineLocation::VirtualFP);
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MachineLocation SPSrc(MachineLocation::VirtualFP, -FrameSize);
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Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc));
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// Add callee saved registers to move list.
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
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int Offset = MFI->getObjectOffset(CSI[I].getFrameIdx());
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unsigned Reg = CSI[I].getReg();
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if (Reg == SPU::R0) continue;
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MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
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MachineLocation CSSrc(Reg);
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Moves.push_back(MachineMove(FrameLabel, CSDst, CSSrc));
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}
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// Mark effective beginning of when frame pointer is ready.
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MCSymbol *ReadyLabel = MMI.getContext().CreateTempSymbol();
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BuildMI(MBB, MBBI, dl, TII.get(SPU::PROLOG_LABEL)).addSym(ReadyLabel);
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MachineLocation FPDst(SPU::R1);
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MachineLocation FPSrc(MachineLocation::VirtualFP);
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Moves.push_back(MachineMove(ReadyLabel, FPDst, FPSrc));
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}
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}
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}
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void SPUFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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const SPUInstrInfo &TII =
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*static_cast<const SPUInstrInfo*>(MF.getTarget().getInstrInfo());
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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int FrameSize = MFI->getStackSize();
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int LinkSlotOffset = SPUFrameLowering::stackSlotSize();
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DebugLoc dl = MBBI->getDebugLoc();
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assert(MBBI->getOpcode() == SPU::RET &&
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"Can only insert epilog into returning blocks");
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assert((FrameSize & 0xf) == 0 && "FrameSize not aligned");
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// the "empty" frame size is 16 - just the register scavenger spill slot
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if (FrameSize > 16 || MFI->adjustsStack()) {
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FrameSize = FrameSize + SPUFrameLowering::minStackSize();
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if (isInt<10>(FrameSize + LinkSlotOffset)) {
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// Reload $lr, adjust $sp by required amount
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// Note: We do this to slightly improve dual issue -- not by much, but it
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// is an opportunity for dual issue.
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BuildMI(MBB, MBBI, dl, TII.get(SPU::LQDr128), SPU::R0)
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.addImm(FrameSize + LinkSlotOffset)
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.addReg(SPU::R1);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1)
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.addReg(SPU::R1)
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.addImm(FrameSize);
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} else if (FrameSize <= (1 << 16) - 1 && FrameSize >= -(1 << 16)) {
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// Frame size can be loaded into ILr32n, so temporarily spill $r2 and use
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// $r2 to adjust $sp:
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BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2)
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.addImm(16)
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.addReg(SPU::R1);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::ILr32), SPU::R2)
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.addImm(FrameSize);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::Ar32), SPU::R1)
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.addReg(SPU::R1)
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.addReg(SPU::R2);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::LQDr128), SPU::R0)
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.addImm(16)
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.addReg(SPU::R1);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::SFIr32), SPU::R2).
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addReg(SPU::R2)
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.addImm(16);
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BuildMI(MBB, MBBI, dl, TII.get(SPU::LQXr128), SPU::R2)
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.addReg(SPU::R2)
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.addReg(SPU::R1);
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} else {
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report_fatal_error("Unhandled frame size: " + Twine(FrameSize));
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}
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}
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}
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void SPUFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS) const{
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// Mark LR and SP unused, since the prolog spills them to stack and
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// we don't want anyone else to spill them for us.
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//
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// Also, unless R2 is really used someday, don't spill it automatically.
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MF.getRegInfo().setPhysRegUnused(SPU::R0);
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MF.getRegInfo().setPhysRegUnused(SPU::R1);
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MF.getRegInfo().setPhysRegUnused(SPU::R2);
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const TargetRegisterClass *RC = &SPU::R32CRegClass;
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RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
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RC->getAlignment(),
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false));
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}
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