llvm-6502/include/llvm/CodeGen
Jakob Stoklund Olesen bf4699c561 Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 23:54:39 +00:00
..
PBQP
Analysis.h
AsmPrinter.h
BinaryObject.h
CalcSpillWeights.h
CallingConvLower.h
FastISel.h
FunctionLoweringInfo.h
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h
JITCodeEmitter.h
LatencyPriorityQueue.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
LiveInterval.h
LiveIntervalAnalysis.h
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionAnalysis.h
MachineFunctionPass.h
MachineInstr.h
MachineInstrBuilder.h
MachineJumpTableInfo.h
MachineLocation.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h
MachinePassRegistry.h
MachineRegisterInfo.h Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE. 2010-10-06 23:54:39 +00:00
MachineRelocation.h
MachineSSAUpdater.h
MachORelocation.h
ObjectCodeEmitter.h
Passes.h
PostRAHazardRecognizer.h
ProcessImplicitDefs.h
PseudoSourceValue.h
RegAllocPBQP.h
RegAllocRegistry.h
RegisterCoalescer.h
RegisterScavenging.h
RuntimeLibcalls.h
ScheduleDAG.h
ScheduleHazardRecognizer.h
SchedulerRegistry.h
SelectionDAG.h
SelectionDAGISel.h
SelectionDAGNodes.h
SlotIndexes.h
TargetLoweringObjectFileImpl.h
ValueTypes.h
ValueTypes.td