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52a261b3c1
passed the root of the match, even though only a few patterns actually needed this (one in X86, several in ARM [which should be refactored anyway], and some in CellSPU that I don't feel like detangling). Instead of requiring all ComplexPatterns to take the dead root, have targets opt into getting the root by putting SDNPWantRoot on the ComplexPattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
1.5 KiB
C++
50 lines
1.5 KiB
C++
//===-- PIC16ISelDAGToDAG.cpp - A dag to dag inst selector for PIC16 ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the PIC16 target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "pic16-isel"
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#include "llvm/Support/ErrorHandling.h"
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#include "PIC16ISelDAGToDAG.h"
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using namespace llvm;
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/// createPIC16ISelDag - This pass converts a legalized DAG into a
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/// PIC16-specific DAG, ready for instruction scheduling.
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FunctionPass *llvm::createPIC16ISelDag(PIC16TargetMachine &TM) {
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return new PIC16DAGToDAGISel(TM);
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}
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/// Select - Select instructions not customized! Used for
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/// expanded, promoted and normal instructions.
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SDNode* PIC16DAGToDAGISel::Select(SDNode *N) {
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// Select the default instruction.
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SDNode *ResNode = SelectCode(N);
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return ResNode;
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}
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// SelectDirectAddr - Match a direct address for DAG.
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// A direct address could be a globaladdress or externalsymbol.
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bool PIC16DAGToDAGISel::SelectDirectAddr(SDValue N, SDValue &Address) {
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// Return true if TGA or ES.
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if (N.getOpcode() == ISD::TargetGlobalAddress
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|| N.getOpcode() == ISD::TargetExternalSymbol) {
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Address = N;
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return true;
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}
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return false;
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}
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