llvm-6502/lib/Target/PowerPC/AsmParser
Ulrich Weigand 8950dd127a [PowerPC] Accept 17-bit signed immediates for addis
The assembler currently strictly verifies that immediates for
s16imm operands are in range (-32768 ... 32767).  This matches
the behaviour of the GNU assembler, with one exception: gas
allows, as a special case, operands in an extended range
(-65536 .. 65535) for the addis instruction only (and its
extended mnemonic lis).

The main reason for this seems to be to allow using unsigned
16-bit operands for lis, e.g. like lis %r1, 0xfedc.

Since this has been supported by gas for a long time, and
assembler source code seen "in the wild" actually exploits
this feature, this patch adds equivalent support to LLVM
for compatibility reasons.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184946 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 13:49:53 +00:00
..
CMakeLists.txt
LLVMBuild.txt [PowerPC] Add missing build dependency 2013-06-20 16:38:00 +00:00
Makefile
PPCAsmParser.cpp [PowerPC] Accept 17-bit signed immediates for addis 2013-06-26 13:49:53 +00:00