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llvm-6502/test
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Evan Cheng 9e23336d0c Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: 
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 22:19:41 +00:00
..
Analysis Fix http://llvm.org/bugs/show_bug.cgi?id=2104 by ordering lexicographically what gets printed. Be const-correct in PrintResults and uninline it too 2008-02-28 08:38:45 +00:00
Archive
Assembler Update bitcode reader and writer to handle multiple return values. 2008-02-26 01:29:32 +00:00
Bindings/Ocaml
Bitcode fix this test. 2008-02-17 00:15:25 +00:00
BugPoint
C++Frontend Add -m32 to compilation line; test is only valid in 2008-03-10 17:56:53 +00:00
CFrontend The __sync primitives only work on x86 and alpha; 2008-03-10 18:38:31 +00:00
CodeGen Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: 2008-03-12 22:19:41 +00:00
DebugInfo Remove llvm-upgrade and update tests. 2008-03-10 07:21:50 +00:00
ExecutionEngine Remove llvm-upgrade and update tests. 2008-03-10 07:21:50 +00:00
Feature no need to keep around this output. 2008-03-12 17:14:06 +00:00
FrontendAda
FrontendObjC
Integer
lib Fix PR2120 by changing the replacement order to change compile_cxx 2008-03-10 06:45:35 +00:00
Linker This passes now 2008-03-10 22:34:11 +00:00
Other Fix a bug that caused opt and other tools to silently ignore 2008-02-23 01:55:25 +00:00
Scripts
TableGen
Transforms Improve the return slot optimization to be both more aggressive (not limited to sret parameters), and 2008-03-12 07:37:44 +00:00
Verifier Remove llvm-upgrade and update tests. 2008-03-10 07:21:50 +00:00
Makefile Fix a typo 2008-03-10 06:49:40 +00:00
Makefile.tests
TestRunner.sh