llvm-6502/lib/Target/Mips/Mips32r6InstrFormats.td
Daniel Sanders e44de6afea Revert: r208582 - [mips][mips64r6] Add sel.s and sel.d
Accidentally committed an unreviewed patch. Reverted it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208583 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12 15:43:41 +00:00

35 lines
964 B
TableGen

//=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file describes Mips32r6 instruction formats.
//
//===----------------------------------------------------------------------===//
class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>,
PredicateControl {
let DecoderNamespace = "Mips32r6_64r6";
let EncodingPredicates = [HasStdEnc];
}
class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst {
bits<5> rd;
bits<5> rs;
bits<5> rt;
bits<32> Inst;
let Inst{31-26} = 0b00000;
let Inst{25-21} = rs;
let Inst{20-16} = rt;
let Inst{15-11} = rd;
let Inst{10-6} = mulop;
let Inst{5-0} = funct;
}