llvm-6502/lib/CodeGen
Vikram S. Adve 3bf089227b Several fixes to handling of int CC register:
(1) An int CC live range must be spilled if there are any interferences,
    even if no other "neighbour" in the interf. graph has been allocated
    that reg. yet.  This is actually true of any class with only one reg!

(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
    be spilled so that the machine-independent spill code doesn't have to
    make the machine-dependent decision of which CC name to use based on
    operand type: %xcc or %icc.  (These are two halves of the same
register.)

(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
    These should never have been the same, and this is necessary now for #2.

(4) All RDCCR and WRCCR instructions are directly generated with the
    phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
    deal with this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7152 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-10 19:42:55 +00:00
..
InstrSched A def. operand of a machine instruction may be an ordinary Value*, 2003-07-02 01:16:01 +00:00
InstrSelection Choose register instead of immediate for ConstantExpr in ChooseRegOrImmed. 2003-07-06 20:33:21 +00:00
Mapping Moved FInfo.cpp to lib/Target/Sparc as it is Sparc-specific. 2003-06-02 23:27:09 +00:00
ModuloScheduling add some comments 2003-06-10 20:04:30 +00:00
PostOpts Peephole optimization pass on final machine code. 2002-09-20 00:42:11 +00:00
PreOpts Moving these files from Code/PreSelection to here. 2002-09-20 00:29:28 +00:00
RegAlloc Several fixes to handling of int CC register: 2003-07-10 19:42:55 +00:00
LiveVariables.cpp (1) Added special register class containing (for now) %fsr. 2003-05-27 00:05:23 +00:00
MachineCodeEmitter.cpp Pass through the emitConstantPool() call to the real emitter. 2003-06-03 20:00:49 +00:00
MachineCodeForInstruction.cpp Move CallArgsDescriptor into this class instead of making it an 2002-10-29 19:38:46 +00:00
MachineFunction.cpp Merged in autoconf branch. This provides configuration via the autoconf 2003-06-30 21:59:07 +00:00
MachineInstr.cpp Allow explicit physical registers for implicit operands. 2003-05-31 07:39:06 +00:00
MachineInstrAnnot.cpp Prune #includes 2003-01-15 19:48:13 +00:00
Makefile Initial checkin of codegen infrastructure for LLVM-JIT 2002-10-25 22:54:41 +00:00
PHIElimination.cpp Fix bug: Jello/2003-06-04-bzip2-bug.ll 2003-06-05 17:15:04 +00:00
PrologEpilogInserter.cpp (1) Added special register class containing (for now) %fsr. 2003-05-27 00:05:23 +00:00
RegAllocLocal.cpp (1) Added special register class containing (for now) %fsr. 2003-05-27 00:05:23 +00:00
RegAllocSimple.cpp (1) Added special register class containing (for now) %fsr. 2003-05-27 00:05:23 +00:00