llvm-6502/test/CodeGen
Matt Arsenault 3c698f35e0 R600: Try to convert BFE back to standard bit ops when possible.
This allows existing DAG combines to work on them, and then
we can re-match to BFE if necessary during instruction selection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209462 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-22 18:09:12 +00:00
..
AArch64 AArch64/ARM64: enable more AArch64 tests. 2014-05-22 07:40:55 +00:00
ARM Segmented stacks: omit __morestack call when there's no frame. 2014-05-22 13:03:43 +00:00
ARM64 Test comment commit. 2014-05-21 16:19:51 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Make unalignedload.ll test stricter and easier to modify for MIPS32r6/MIPS64r6 2014-05-22 11:55:04 +00:00
MSP430
NVPTX
PowerPC [PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16Immediate 2014-05-20 17:20:34 +00:00
R600 R600: Try to convert BFE back to standard bit ops when possible. 2014-05-22 18:09:12 +00:00
SPARC
SystemZ
Thumb Segmented stacks: omit __morestack call when there's no frame. 2014-05-22 13:03:43 +00:00
Thumb2
X86 [X86] Improve the lowering of BITCAST from MVT::f64 to MVT::v4i16/MVT::v8i8. 2014-05-22 16:21:39 +00:00
XCore