Micah Villmow 3e9b6db60f Add in new data types that are used by AMDIL/ANL among others. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164261 91177308-0d34-0410-b5e6-96231b3b80d8		2012-09-19 22:47:07 +00:00
..
AsmMatcherEmitter.cpp	Iterate deterministicaly over ClassInfo*'s	2012-09-19 01:47:03 +00:00
AsmWriterEmitter.cpp	Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed.	2012-09-15 01:22:42 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp	Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub).	2012-09-19 22:15:06 +00:00
CodeGenDAGPatterns.h	Refactor Record* by-ID comparator to Record.h	2012-09-19 01:47:00 +00:00
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenRegisters.cpp
CodeGenRegisters.h
CodeGenSchedule.cpp	SchedMachineModel: compress the CPU's WriteLatencyTable.	2012-09-19 04:43:19 +00:00
CodeGenSchedule.h	SchedMachineModel: compress the CPU's WriteLatencyTable.	2012-09-19 04:43:19 +00:00
CodeGenTarget.cpp	Add in new data types that are used by AMDIL/ANL among others.	2012-09-19 22:47:07 +00:00
CodeGenTarget.h
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp	Add 'virtual' keywoards to output file for overridden functions.	2012-09-16 18:25:36 +00:00
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
EDEmitter.cpp
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp	TableGen: Add initializer.	2012-09-17 18:00:53 +00:00
InstrInfoEmitter.cpp	TableGen subtarget emitter. Use getSchedClassIdx.	2012-09-18 03:55:55 +00:00
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
PseudoLoweringEmitter.cpp	Fix typo	2012-09-17 04:43:39 +00:00
RegisterInfoEmitter.cpp	Add 'virtual' keywoards to output file for overridden functions.	2012-09-16 16:35:22 +00:00
SequenceToOffsetTable.h	Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed.	2012-09-15 01:22:42 +00:00
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h
SubtargetEmitter.cpp	SchedMachineModel: compress the CPU's WriteLatencyTable.	2012-09-19 04:43:19 +00:00
TableGen.cpp
TableGenBackends.h
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp	Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L.	2012-09-19 06:37:45 +00:00
X86RecognizableInstr.h	Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L.	2012-09-19 06:37:45 +00:00