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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41743 91177308-0d34-0410-b5e6-96231b3b80d8
133 lines
5.4 KiB
C++
133 lines
5.4 KiB
C++
//===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines interfaces to access the target independent code generation
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// passes provided by the LLVM backend.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_PASSES_H
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#define LLVM_CODEGEN_PASSES_H
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#include <iosfwd>
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#include <string>
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namespace llvm {
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class FunctionPass;
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class PassInfo;
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class TargetMachine;
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class RegisterCoalescer;
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/// createUnreachableBlockEliminationPass - The LLVM code generator does not
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/// work well with unreachable basic blocks (what live ranges make sense for a
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/// block that cannot be reached?). As such, a code generator should either
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/// not instruction select unreachable blocks, or it can run this pass as it's
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/// last LLVM modifying pass to clean up blocks that are not reachable from
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/// the entry block.
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FunctionPass *createUnreachableBlockEliminationPass();
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/// MachineFunctionPrinter pass - This pass prints out the machine function to
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/// standard error, as a debugging tool.
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FunctionPass *createMachineFunctionPrinterPass(std::ostream *OS,
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const std::string &Banner ="");
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/// PHIElimination pass - This pass eliminates machine instruction PHI nodes
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/// by inserting copy instructions. This destroys SSA information, but is the
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/// desired input for some register allocators. This pass is "required" by
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/// these register allocator like this: AU.addRequiredID(PHIEliminationID);
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///
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extern const PassInfo *PHIEliminationID;
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/// SimpleRegisterCoalescing pass. Aggressively coalesces every register
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/// copy it can.
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///
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extern const PassInfo *SimpleRegisterCoalescingID;
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/// TwoAddressInstruction pass - This pass reduces two-address instructions to
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/// use two operands. This destroys SSA information but it is desired by
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/// register allocators.
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extern const PassInfo *TwoAddressInstructionPassID;
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/// Creates a register allocator as the user specified on the command line.
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///
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FunctionPass *createRegisterAllocator();
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/// SimpleRegisterAllocation Pass - This pass converts the input machine code
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/// from SSA form to use explicit registers by spilling every register. Wow,
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/// great policy huh?
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///
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FunctionPass *createSimpleRegisterAllocator();
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/// LocalRegisterAllocation Pass - This pass register allocates the input code
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/// a basic block at a time, yielding code better than the simple register
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/// allocator, but not as good as a global allocator.
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///
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FunctionPass *createLocalRegisterAllocator();
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/// BigBlockRegisterAllocation Pass - The BigBlock register allocator
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/// munches single basic blocks at a time, like the local register
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/// allocator. While the BigBlock allocator is a little slower, and uses
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/// somewhat more memory than the local register allocator, it tends to
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/// yield the best allocations (of any of the allocators) for blocks that
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/// have hundreds or thousands of instructions in sequence.
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///
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FunctionPass *createBigBlockRegisterAllocator();
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/// LinearScanRegisterAllocation Pass - This pass implements the linear scan
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/// register allocation algorithm, a global register allocator.
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///
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FunctionPass *createLinearScanRegisterAllocator();
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/// SimpleRegisterCoalescing Pass - Coalesce all copies possible. Can run
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/// independently of the register allocator.
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///
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RegisterCoalescer *createSimpleRegisterCoalescer();
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/// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
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/// and eliminates abstract frame references.
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///
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FunctionPass *createPrologEpilogCodeInserter();
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/// LowerSubregs Pass - This pass lowers subregs to register-register copies
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/// which yields suboptimal, but correct code if the register allocator
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/// cannot coalesce all subreg operations during allocation.
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///
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FunctionPass *createLowerSubregsPass();
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/// createPostRAScheduler - under development.
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FunctionPass *createPostRAScheduler();
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/// BranchFolding Pass - This pass performs machine code CFG based
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/// optimizations to delete branches to branches, eliminate branches to
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/// successor blocks (creating fall throughs), and eliminating branches over
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/// branches.
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FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
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/// IfConverter Pass - This pass performs machine code if conversion.
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FunctionPass *createIfConverterPass();
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/// DebugLabelFoldingPass - This pass prunes out redundant debug labels. This
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/// allows a debug emitter to determine if the range of two labels is empty,
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/// by seeing if the labels map to the same reduced label.
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FunctionPass *createDebugLabelFoldingPass();
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/// MachineCodeDeletion Pass - This pass deletes all of the machine code for
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/// the current function, which should happen after the function has been
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/// emitted to a .s file or to memory.
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FunctionPass *createMachineCodeDeleter();
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/// getRegisterAllocator - This creates an instance of the register allocator
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/// for the Sparc.
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FunctionPass *getRegisterAllocator(TargetMachine &T);
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} // End llvm namespace
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#endif
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