mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 04:33:05 +00:00
1ef70ff39b
Now that `Metadata` is typeless, reflect that in the assembly. These
are the matching assembly changes for the metadata/value split in
r223802.
- Only use the `metadata` type when referencing metadata from a call
intrinsic -- i.e., only when it's used as a `Value`.
- Stop pretending that `ValueAsMetadata` is wrapped in an `MDNode`
when referencing it from call intrinsics.
So, assembly like this:
define @foo(i32 %v) {
call void @llvm.foo(metadata !{i32 %v}, metadata !0)
call void @llvm.foo(metadata !{i32 7}, metadata !0)
call void @llvm.foo(metadata !1, metadata !0)
call void @llvm.foo(metadata !3, metadata !0)
call void @llvm.foo(metadata !{metadata !3}, metadata !0)
ret void, !bar !2
}
!0 = metadata !{metadata !2}
!1 = metadata !{i32* @global}
!2 = metadata !{metadata !3}
!3 = metadata !{}
turns into this:
define @foo(i32 %v) {
call void @llvm.foo(metadata i32 %v, metadata !0)
call void @llvm.foo(metadata i32 7, metadata !0)
call void @llvm.foo(metadata i32* @global, metadata !0)
call void @llvm.foo(metadata !3, metadata !0)
call void @llvm.foo(metadata !{!3}, metadata !0)
ret void, !bar !2
}
!0 = !{!2}
!1 = !{i32* @global}
!2 = !{!3}
!3 = !{}
I wrote an upgrade script that handled almost all of the tests in llvm
and many of the tests in cfe (even handling many `CHECK` lines). I've
attached it (or will attach it in a moment if you're speedy) to PR21532
to help everyone update their out-of-tree testcases.
This is part of PR21532.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224257 91177308-0d34-0410-b5e6-96231b3b80d8
177 lines
5.7 KiB
LLVM
177 lines
5.7 KiB
LLVM
; RUN: opt < %s -mcpu=corei7 -O1 -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=O1
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; RUN: opt < %s -mcpu=corei7 -O2 -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=O2
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; RUN: opt < %s -mcpu=corei7 -O3 -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=O3
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; RUN: opt < %s -mcpu=corei7 -Os -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=Os
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; RUN: opt < %s -mcpu=corei7 -Oz -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=Oz
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; RUN: opt < %s -mcpu=corei7 -O1 -vectorize-loops -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=O1VEC
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; RUN: opt < %s -mcpu=corei7 -Oz -vectorize-loops -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=OzVEC
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; RUN: opt < %s -mcpu=corei7 -O1 -loop-vectorize -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=O1VEC2
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; RUN: opt < %s -mcpu=corei7 -Oz -loop-vectorize -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=OzVEC2
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; RUN: opt < %s -mcpu=corei7 -O3 -disable-loop-vectorization -S -unroll-allow-partial=0 | FileCheck %s --check-prefix=O3DIS
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; This file tests the llvm.loop.vectorize.enable metadata forcing
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; vectorization even when optimization levels are too low, or when
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; vectorization is disabled.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; O1-LABEL: @enabled(
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; O1: store <4 x i32>
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; O1: ret i32
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; O2-LABEL: @enabled(
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; O2: store <4 x i32>
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; O2: ret i32
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; O3-LABEL: @enabled(
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; O3: store <4 x i32>
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; O3: ret i32
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; Pragma always wins!
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; O3DIS-LABEL: @enabled(
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; O3DIS: store <4 x i32>
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; O3DIS: ret i32
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; Os-LABEL: @enabled(
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; Os: store <4 x i32>
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; Os: ret i32
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; Oz-LABEL: @enabled(
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; Oz: store <4 x i32>
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; Oz: ret i32
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; O1VEC-LABEL: @enabled(
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; O1VEC: store <4 x i32>
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; O1VEC: ret i32
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; OzVEC-LABEL: @enabled(
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; OzVEC: store <4 x i32>
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; OzVEC: ret i32
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; O1VEC2-LABEL: @enabled(
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; O1VEC2: store <4 x i32>
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; O1VEC2: ret i32
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; OzVEC2-LABEL: @enabled(
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; OzVEC2: store <4 x i32>
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; OzVEC2: ret i32
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define i32 @enabled(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %N) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv
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%0 = load i32* %arrayidx, align 4
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%add = add nsw i32 %0, %N
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%arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv
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store i32 %add, i32* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 32
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !0
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for.end: ; preds = %for.body
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%1 = load i32* %a, align 4
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ret i32 %1
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}
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; O1-LABEL: @nopragma(
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; O1-NOT: store <4 x i32>
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; O1: ret i32
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; O2-LABEL: @nopragma(
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; O2: store <4 x i32>
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; O2: ret i32
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; O3-LABEL: @nopragma(
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; O3: store <4 x i32>
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; O3: ret i32
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; O3DIS-LABEL: @nopragma(
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; O3DIS-NOT: store <4 x i32>
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; O3DIS: ret i32
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; Os-LABEL: @nopragma(
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; Os: store <4 x i32>
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; Os: ret i32
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; Oz-LABEL: @nopragma(
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; Oz-NOT: store <4 x i32>
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; Oz: ret i32
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; O1VEC-LABEL: @nopragma(
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; O1VEC: store <4 x i32>
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; O1VEC: ret i32
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; OzVEC-LABEL: @nopragma(
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; OzVEC: store <4 x i32>
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; OzVEC: ret i32
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; O1VEC2-LABEL: @nopragma(
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; O1VEC2: store <4 x i32>
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; O1VEC2: ret i32
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; OzVEC2-LABEL: @nopragma(
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; OzVEC2: store <4 x i32>
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; OzVEC2: ret i32
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define i32 @nopragma(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %N) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv
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%0 = load i32* %arrayidx, align 4
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%add = add nsw i32 %0, %N
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%arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv
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store i32 %add, i32* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 32
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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%1 = load i32* %a, align 4
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ret i32 %1
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}
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; O1-LABEL: @disabled(
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; O1-NOT: store <4 x i32>
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; O1: ret i32
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; O2-LABEL: @disabled(
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; O2-NOT: store <4 x i32>
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; O2: ret i32
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; O3-LABEL: @disabled(
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; O3-NOT: store <4 x i32>
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; O3: ret i32
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; O3DIS-LABEL: @disabled(
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; O3DIS-NOT: store <4 x i32>
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; O3DIS: ret i32
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; Os-LABEL: @disabled(
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; Os-NOT: store <4 x i32>
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; Os: ret i32
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; Oz-LABEL: @disabled(
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; Oz-NOT: store <4 x i32>
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; Oz: ret i32
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; O1VEC-LABEL: @disabled(
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; O1VEC-NOT: store <4 x i32>
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; O1VEC: ret i32
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; OzVEC-LABEL: @disabled(
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; OzVEC-NOT: store <4 x i32>
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; OzVEC: ret i32
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; O1VEC2-LABEL: @disabled(
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; O1VEC2-NOT: store <4 x i32>
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; O1VEC2: ret i32
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; OzVEC2-LABEL: @disabled(
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; OzVEC2-NOT: store <4 x i32>
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; OzVEC2: ret i32
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define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32 %N) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv
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%0 = load i32* %arrayidx, align 4
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%add = add nsw i32 %0, %N
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%arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv
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store i32 %add, i32* %arrayidx2, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 32
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br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !2
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for.end: ; preds = %for.body
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%1 = load i32* %a, align 4
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ret i32 %1
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}
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!0 = !{!0, !1}
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!1 = !{!"llvm.loop.vectorize.enable", i1 1}
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!2 = !{!2, !3}
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!3 = !{!"llvm.loop.vectorize.enable", i1 0}
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