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https://github.com/c64scene-ar/llvm-6502.git
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d5c2318adc
An unreachable default destination can be exploited by other optimizations and allows for more efficient lowering. Both the SDag switch lowering and LowerSwitch can exploit unreachable defaults. Also make TurnSwitchRangeICmp handle switches with unreachable default. This is kind of separate change, but it cannot be tested without the change above, and I don't want to land the change above without this since that would regress other tests. Differential Revision: http://reviews.llvm.org/D6471 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227125 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
1.7 KiB
LLVM
95 lines
1.7 KiB
LLVM
; RUN: opt < %s -simplifycfg -S | FileCheck %s
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define void @test1(i1 %C, i1* %BP) {
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; CHECK-LABEL: @test1(
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; CHECK: entry:
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; CHECK-NEXT: ret void
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entry:
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br i1 %C, label %T, label %F
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T:
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store i1 %C, i1* %BP
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unreachable
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F:
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ret void
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}
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define void @test2() {
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; CHECK-LABEL: @test2(
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; CHECK: entry:
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; CHECK-NEXT: call void @test2()
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; CHECK-NEXT: ret void
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entry:
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invoke void @test2( )
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to label %N unwind label %U
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U:
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unreachable
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N:
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ret void
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}
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define i32 @test3(i32 %v) {
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; CHECK-LABEL: @test3(
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; CHECK: entry:
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; CHECK-NEXT: [[CMP:%[A-Za-z0-9]+]] = icmp eq i32 %v, 2
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; CHECK-NEXT: select i1 [[CMP]], i32 2, i32 1
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; CHECK-NEXT: ret
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entry:
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switch i32 %v, label %default [
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i32 1, label %U
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i32 2, label %T
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]
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default:
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ret i32 1
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U:
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unreachable
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T:
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ret i32 2
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}
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;; We can either convert the following control-flow to a select or remove the
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;; unreachable control flow because of the undef store of null. Make sure we do
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;; the latter.
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define void @test5(i1 %cond, i8* %ptr) {
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; CHECK-LABEL: test5
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; CHECK: entry:
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; CHECK-NOT: select
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; CHECK: store i8 2, i8* %ptr
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; CHECK: ret
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entry:
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br i1 %cond, label %bb1, label %bb3
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bb3:
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br label %bb2
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bb1:
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br label %bb2
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bb2:
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%ptr.2 = phi i8* [ %ptr, %bb3 ], [ null, %bb1 ]
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store i8 2, i8* %ptr.2, align 8
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ret void
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}
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; CHECK-LABEL: test6
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; CHECK: entry:
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; CHECK-NOT: select
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; CHECK: store i8 2, i8* %ptr
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; CHECK: ret
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define void @test6(i1 %cond, i8* %ptr) {
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entry:
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br i1 %cond, label %bb1, label %bb2
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bb1:
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br label %bb2
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bb2:
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%ptr.2 = phi i8* [ %ptr, %entry ], [ null, %bb1 ]
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store i8 2, i8* %ptr.2, align 8
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ret void
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}
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