llvm-6502/test/CodeGen
Matt Arsenault 3d1ca355c4 R600/SI: Don't promote f32 select to i32
This is nice for the instruction patterns, but it complicates
min / max matching. The select doesn't have the correct type and would
require looking through the bitcasts for the real float operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224092 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 02:30:29 +00:00
..
AArch64
ARM
CPP
Generic
Hexagon
Inputs
Mips [mips][microMIPS] Implement CodeGen support for LI16 instruction. 2014-12-11 13:56:23 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Better lowering for add/or of a FrameIndex 2014-12-11 22:51:06 +00:00
R600 R600/SI: Don't promote f32 select to i32 2014-12-12 02:30:29 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 [X86] Add a temporary testcase for PR21876/r223996. 2014-12-11 23:07:52 +00:00
XCore