Colin LeMahieu 3d1d6d9043 [Hexagon] Adding encoding for misc v4 instructions: boundscheck, tlbmatch, dcfetch. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225283 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-06 19:03:20 +00:00
..
AArch64	Condition codes AL and NV are invalid in the aliases that use	2014-06-10 13:11:35 +00:00
ARM	Add support for ARM modified-immediate assembly syntax.	2014-12-02 10:53:20 +00:00
Hexagon	[Hexagon] Adding encoding for misc v4 instructions: boundscheck, tlbmatch, dcfetch.	2015-01-06 19:03:20 +00:00
Mips	[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions	2014-12-23 19:55:34 +00:00
PowerPC	[PowerPC] Add support for the CMPB instruction	2015-01-03 01:16:37 +00:00
Sparc
SystemZ	[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA	2014-07-10 11:00:55 +00:00
X86	[X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.	2015-01-06 08:59:30 +00:00
XCore