llvm-6502/lib
Hal Finkel 3d2ce7a5a7 Swap PPC isel operands to allow for 0-folding
The PPC isel instruction can fold 0 into the first operand (thus eliminating
the need to materialize a zero-containing register when the 'true' result of
the isel is 0). When the isel is fed by a bit register operation that we can
invert, do so as part of the bit-register-operation peephole routine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202469 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 06:11:16 +00:00
..
Analysis Remove unnecessary llvm:: qualification. 2014-02-26 23:27:16 +00:00
AsmParser
Bitcode
CodeGen Fix visitTRUNCATE for legal i1 values 2014-02-28 00:26:45 +00:00
DebugInfo
ExecutionEngine
IR Add a debug info code generation level to the compile unit metadata 2014-02-27 01:24:56 +00:00
IRReader
LineEditor
Linker Compare DataLayout by Value, not by pointer. 2014-02-26 17:02:08 +00:00
LTO
MC Remove MCPureStreamer. 2014-02-27 16:17:34 +00:00
Object Now that it is possible, use the mangler in IRObjectFile. 2014-02-28 02:17:23 +00:00
Option
Support Re-apply r200853, which should not crash after Clang plugins were converted to loadable modules in r201256. 2014-02-27 14:47:37 +00:00
TableGen Fix odd indentation. 2014-02-27 03:11:13 +00:00
Target Swap PPC isel operands to allow for 0-folding 2014-02-28 06:11:16 +00:00
Transforms [asan] fix a pair of silly typos 2014-02-27 13:13:59 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile