llvm-6502/lib
Ulrich Weigand 3d386421e0 PowerPC: Mark patterns as isCodeGenOnly.
There remain a number of patterns that cannot (and should not)
be handled by the asm parser, in particular all the Pseudo patterns.

This commit marks those patterns as isCodeGenOnly.

No change in generated code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178008 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26 10:57:16 +00:00
..
Analysis Fix SCEV forgetMemoizedResults should search and destroy backedge exprs. 2013-03-26 03:14:53 +00:00
Archive
AsmParser
Bitcode
CodeGen Enhance folding of (extract_subvec (insert_subvec V1, V2, IIdx), EIdx) 2013-03-25 23:47:35 +00:00
DebugInfo
ExecutionEngine
IR
IRReader Split out the IRReader header and the utility functions it provides into 2013-03-26 02:25:37 +00:00
Linker
MC
Object
Option
Support Add missing file to cmake build. 2013-03-26 01:29:15 +00:00
TableGen Allow TableGen DAG arguments to be just a name. 2013-03-24 19:36:51 +00:00
Target PowerPC: Mark patterns as isCodeGenOnly. 2013-03-26 10:57:16 +00:00
Transforms [ObjCARC Annotations] Added support for displaying the state of pointers at the bottom/top of BBs of the ARC dataflow analysis for both bottomup and topdown analyses. 2013-03-26 00:42:09 +00:00
CMakeLists.txt Split out the IRReader header and the utility functions it provides into 2013-03-26 02:25:37 +00:00
LLVMBuild.txt Split out the IRReader header and the utility functions it provides into 2013-03-26 02:25:37 +00:00
Makefile Split out the IRReader header and the utility functions it provides into 2013-03-26 02:25:37 +00:00