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28660d4b2f
This patch adds a feature flag to avoid unaligned 32-byte load/store AVX codegen for Sandy Bridge and Ivy Bridge. There is no functionality change intended for those chips. Previously, the absence of AVX2 was being used as a proxy to detect this feature. But that hindered codegen for AVX-enabled AMD chips such as btver2 that do not have the 32-byte unaligned access slowdown. Performance measurements are included in PR21541 ( http://llvm.org/bugs/show_bug.cgi?id=21541 ). Differential Revision: http://reviews.llvm.org/D6355 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222544 91177308-0d34-0410-b5e6-96231b3b80d8
372 lines
12 KiB
C++
372 lines
12 KiB
C++
//===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the X86 specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "X86Subtarget.h"
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#include "X86InstrInfo.h"
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#include "X86TargetMachine.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Host.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#if defined(_MSC_VER)
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#include <intrin.h>
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#endif
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using namespace llvm;
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#define DEBUG_TYPE "subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "X86GenSubtargetInfo.inc"
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// Temporary option to control early if-conversion for x86 while adding machine
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// models.
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static cl::opt<bool>
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X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
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cl::desc("Enable early if-conversion on X86"));
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/// ClassifyBlockAddressReference - Classify a blockaddress reference for the
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/// current subtarget according to how we should reference it in a non-pcrel
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/// context.
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unsigned char X86Subtarget::ClassifyBlockAddressReference() const {
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if (isPICStyleGOT()) // 32-bit ELF targets.
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return X86II::MO_GOTOFF;
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if (isPICStyleStubPIC()) // Darwin/32 in PIC mode.
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return X86II::MO_PIC_BASE_OFFSET;
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// Direct static reference to label.
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return X86II::MO_NO_FLAG;
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}
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/// ClassifyGlobalReference - Classify a global variable reference for the
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/// current subtarget according to how we should reference it in a non-pcrel
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/// context.
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unsigned char X86Subtarget::
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ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const {
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// DLLImport only exists on windows, it is implemented as a load from a
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// DLLIMPORT stub.
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if (GV->hasDLLImportStorageClass())
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return X86II::MO_DLLIMPORT;
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bool isDecl = GV->isDeclarationForLinker();
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// X86-64 in PIC mode.
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if (isPICStyleRIPRel()) {
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// Large model never uses stubs.
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if (TM.getCodeModel() == CodeModel::Large)
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return X86II::MO_NO_FLAG;
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if (isTargetDarwin()) {
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// If symbol visibility is hidden, the extra load is not needed if
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// target is x86-64 or the symbol is definitely defined in the current
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// translation unit.
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if (GV->hasDefaultVisibility() &&
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(isDecl || GV->isWeakForLinker()))
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return X86II::MO_GOTPCREL;
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} else if (!isTargetWin64()) {
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assert(isTargetELF() && "Unknown rip-relative target");
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// Extra load is needed for all externally visible.
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if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
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return X86II::MO_GOTPCREL;
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}
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return X86II::MO_NO_FLAG;
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}
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if (isPICStyleGOT()) { // 32-bit ELF targets.
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// Extra load is needed for all externally visible.
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if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
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return X86II::MO_GOTOFF;
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return X86II::MO_GOT;
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}
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if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode.
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// Determine whether we have a stub reference and/or whether the reference
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// is relative to the PIC base or not.
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// If this is a strong reference to a definition, it is definitely not
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// through a stub.
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if (!isDecl && !GV->isWeakForLinker())
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return X86II::MO_PIC_BASE_OFFSET;
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// Unless we have a symbol with hidden visibility, we have to go through a
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// normal $non_lazy_ptr stub because this symbol might be resolved late.
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if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
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return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
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// If symbol visibility is hidden, we have a stub for common symbol
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// references and external declarations.
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if (isDecl || GV->hasCommonLinkage()) {
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// Hidden $non_lazy_ptr reference.
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return X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE;
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}
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// Otherwise, no stub.
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return X86II::MO_PIC_BASE_OFFSET;
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}
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if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode.
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// Determine whether we have a stub reference.
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// If this is a strong reference to a definition, it is definitely not
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// through a stub.
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if (!isDecl && !GV->isWeakForLinker())
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return X86II::MO_NO_FLAG;
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// Unless we have a symbol with hidden visibility, we have to go through a
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// normal $non_lazy_ptr stub because this symbol might be resolved late.
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if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
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return X86II::MO_DARWIN_NONLAZY;
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// Otherwise, no stub.
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return X86II::MO_NO_FLAG;
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}
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// Direct static reference to global.
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return X86II::MO_NO_FLAG;
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}
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/// getBZeroEntry - This function returns the name of a function which has an
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/// interface like the non-standard bzero function, if such a function exists on
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/// the current subtarget and it is considered prefereable over memset with zero
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/// passed as the second argument. Otherwise it returns null.
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const char *X86Subtarget::getBZeroEntry() const {
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// Darwin 10 has a __bzero entry point for this purpose.
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if (getTargetTriple().isMacOSX() &&
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!getTargetTriple().isMacOSXVersionLT(10, 6))
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return "__bzero";
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return nullptr;
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}
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bool X86Subtarget::hasSinCos() const {
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return getTargetTriple().isMacOSX() &&
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!getTargetTriple().isMacOSXVersionLT(10, 9) &&
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is64Bit();
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}
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/// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
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/// to immediate address.
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bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const {
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// FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
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// but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
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// the following check for Win32 should be removed.
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if (In64BitMode || isTargetWin32())
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return false;
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return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
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}
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void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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std::string CPUName = CPU;
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if (CPUName.empty())
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CPUName = "generic";
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// Make sure 64-bit features are available in 64-bit mode. (But make sure
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// SSE2 can be turned off explicitly.)
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std::string FullFS = FS;
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if (In64BitMode) {
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if (!FullFS.empty())
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FullFS = "+64bit,+sse2," + FullFS;
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else
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FullFS = "+64bit,+sse2";
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}
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// If feature string is not empty, parse features string.
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ParseSubtargetFeatures(CPUName, FullFS);
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// Make sure the right MCSchedModel is used.
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InitCPUSchedModel(CPUName);
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InstrItins = getInstrItineraryForCPU(CPUName);
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// It's important to keep the MCSubtargetInfo feature bits in sync with
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// target data structure which is shared with MC code emitter, etc.
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if (In64BitMode)
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ToggleFeature(X86::Mode64Bit);
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else if (In32BitMode)
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ToggleFeature(X86::Mode32Bit);
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else if (In16BitMode)
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ToggleFeature(X86::Mode16Bit);
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else
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llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!");
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DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
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<< ", 3DNowLevel " << X863DNowLevel
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<< ", 64bit " << HasX86_64 << "\n");
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assert((!In64BitMode || HasX86_64) &&
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"64-bit code requested on a subtarget that doesn't support it!");
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// Stack alignment is 16 bytes on Darwin, Linux and Solaris (both
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// 32 and 64 bit) and for all 64-bit targets.
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if (StackAlignOverride)
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stackAlignment = StackAlignOverride;
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else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
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In64BitMode)
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stackAlignment = 16;
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}
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void X86Subtarget::initializeEnvironment() {
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X86SSELevel = NoMMXSSE;
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X863DNowLevel = NoThreeDNow;
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HasCMov = false;
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HasX86_64 = false;
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HasPOPCNT = false;
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HasSSE4A = false;
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HasAES = false;
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HasPCLMUL = false;
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HasFMA = false;
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HasFMA4 = false;
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HasXOP = false;
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HasTBM = false;
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HasMOVBE = false;
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HasRDRAND = false;
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HasF16C = false;
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HasFSGSBase = false;
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HasLZCNT = false;
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HasBMI = false;
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HasBMI2 = false;
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HasRTM = false;
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HasHLE = false;
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HasERI = false;
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HasCDI = false;
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HasPFI = false;
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HasDQI = false;
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HasBWI = false;
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HasVLX = false;
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HasADX = false;
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HasSHA = false;
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HasSGX = false;
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HasPRFCHW = false;
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HasRDSEED = false;
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HasSMAP = false;
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IsBTMemSlow = false;
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IsSHLDSlow = false;
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IsUAMemFast = false;
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IsUAMem32Slow = false;
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HasVectorUAMem = false;
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HasCmpxchg16b = false;
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UseLeaForSP = false;
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HasSlowDivide32 = false;
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HasSlowDivide64 = false;
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PadShortFunctions = false;
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CallRegIndirect = false;
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LEAUsesAG = false;
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SlowLEA = false;
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SlowIncDec = false;
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UseSqrtEst = false;
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UseReciprocalEst = false;
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stackAlignment = 4;
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// FIXME: this is a known good value for Yonah. How about others?
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MaxInlineSizeThreshold = 128;
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}
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static std::string computeDataLayout(const Triple &TT) {
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// X86 is little endian
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std::string Ret = "e";
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Ret += DataLayout::getManglingComponent(TT);
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// X86 and x32 have 32 bit pointers.
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if ((TT.isArch64Bit() &&
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(TT.getEnvironment() == Triple::GNUX32 || TT.isOSNaCl())) ||
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!TT.isArch64Bit())
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Ret += "-p:32:32";
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// Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
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if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl())
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Ret += "-i64:64";
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else
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Ret += "-f64:32:64";
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// Some ABIs align long double to 128 bits, others to 32.
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if (TT.isOSNaCl())
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; // No f80
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else if (TT.isArch64Bit() || TT.isOSDarwin())
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Ret += "-f80:128";
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else
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Ret += "-f80:32";
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// The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
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if (TT.isArch64Bit())
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Ret += "-n8:16:32:64";
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else
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Ret += "-n8:16:32";
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// The stack is aligned to 32 bits on some ABIs and 128 bits on others.
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if (!TT.isArch64Bit() && TT.isOSWindows())
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Ret += "-S32";
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else
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Ret += "-S128";
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return Ret;
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}
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X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
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StringRef FS) {
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initializeEnvironment();
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initSubtargetFeatures(CPU, FS);
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return *this;
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}
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X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS, const X86TargetMachine &TM,
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unsigned StackAlignOverride)
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: X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
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PICStyle(PICStyles::None), TargetTriple(TT),
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DL(computeDataLayout(TargetTriple)),
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StackAlignOverride(StackAlignOverride),
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In64BitMode(TargetTriple.getArch() == Triple::x86_64),
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In32BitMode(TargetTriple.getArch() == Triple::x86 &&
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TargetTriple.getEnvironment() != Triple::CODE16),
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In16BitMode(TargetTriple.getArch() == Triple::x86 &&
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TargetTriple.getEnvironment() == Triple::CODE16),
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TSInfo(DL), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
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TLInfo(TM), FrameLowering(TargetFrameLowering::StackGrowsDown,
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getStackAlignment(), is64Bit() ? -8 : -4) {
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// Determine the PICStyle based on the target selected.
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if (TM.getRelocationModel() == Reloc::Static) {
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// Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
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setPICStyle(PICStyles::None);
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} else if (is64Bit()) {
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// PIC in 64 bit mode is always rip-rel.
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setPICStyle(PICStyles::RIPRel);
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} else if (isTargetCOFF()) {
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setPICStyle(PICStyles::None);
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} else if (isTargetDarwin()) {
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if (TM.getRelocationModel() == Reloc::PIC_)
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setPICStyle(PICStyles::StubPIC);
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else {
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assert(TM.getRelocationModel() == Reloc::DynamicNoPIC);
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setPICStyle(PICStyles::StubDynamicNoPIC);
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}
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} else if (isTargetELF()) {
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setPICStyle(PICStyles::GOT);
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}
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}
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bool X86Subtarget::enableEarlyIfConversion() const {
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return hasCMov() && X86EarlyIfConv;
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}
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