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This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
91 lines
2.1 KiB
LLVM
91 lines
2.1 KiB
LLVM
; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
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; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON
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; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
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; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=A8
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; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=A8U
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; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8U
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define float @t1(float %acc, float %a, float %b) nounwind {
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entry:
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; VFP2-LABEL: t1:
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; VFP2: vnmla.f32
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; NEON-LABEL: t1:
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; NEON: vnmla.f32
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; A8U-LABEL: t1:
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; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
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; A8-LABEL: t1:
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; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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%0 = fmul float %a, %b
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%1 = fsub float -0.0, %0
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%2 = fsub float %1, %acc
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ret float %2
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}
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define float @t2(float %acc, float %a, float %b) nounwind {
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entry:
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; VFP2-LABEL: t2:
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; VFP2: vnmla.f32
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; NEON-LABEL: t2:
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; NEON: vnmla.f32
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; A8U-LABEL: t2:
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; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
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; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}}
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; A8-LABEL: t2:
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; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
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; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
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%0 = fmul float %a, %b
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%1 = fmul float -1.0, %0
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%2 = fsub float %1, %acc
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ret float %2
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}
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define double @t3(double %acc, double %a, double %b) nounwind {
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entry:
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; VFP2-LABEL: t3:
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; VFP2: vnmla.f64
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; NEON-LABEL: t3:
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; NEON: vnmla.f64
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; A8U-LABEL: t3:
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; A8U: vnmul.f64 d
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; A8U: vsub.f64 d
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; A8-LABEL: t3:
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; A8: vnmul.f64 d
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; A8: vsub.f64 d
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%0 = fmul double %a, %b
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%1 = fsub double -0.0, %0
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%2 = fsub double %1, %acc
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ret double %2
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}
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define double @t4(double %acc, double %a, double %b) nounwind {
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entry:
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; VFP2-LABEL: t4:
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; VFP2: vnmla.f64
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; NEON-LABEL: t4:
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; NEON: vnmla.f64
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; A8U-LABEL: t4:
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; A8U: vnmul.f64 d
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; A8U: vsub.f64 d
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; A8-LABEL: t4:
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; A8: vnmul.f64 d
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; A8: vsub.f64 d
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%0 = fmul double %a, %b
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%1 = fmul double -1.0, %0
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%2 = fsub double %1, %acc
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ret double %2
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}
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