Bill Wendling d36d03bf2d Added a check so that if we have two machine instructions in this form ...

MOV R0, R1
    MOV R1, R0

the second machine instruction is removed. Added a regression test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29792 91177308-0d34-0410-b5e6-96231b3b80d8

2006-08-21 07:33:33 +00:00

..

SelectionDAG

switch the SUnit pred/succ sets from being std::sets to being smallvectors.

2006-08-17 00:09:56 +00:00

AsmPrinter.cpp

Emit .set directives for jump table entries when possible, which reduces

2006-08-12 21:29:52 +00:00

BranchFolding.cpp

…

DwarfWriter.cpp

…

ELFWriter.cpp

…

IntrinsicLowering.cpp

…

LiveInterval.cpp

…

LiveIntervalAnalysis.cpp

…

LiveVariables.cpp

…

MachineBasicBlock.cpp

…

MachineDebugInfo.cpp

…

MachineFunction.cpp

…

MachineInstr.cpp

…

MachinePassRegistry.cpp

Final polish on machine pass registries.

2006-08-02 12:30:23 +00:00

Makefile

…

Passes.cpp

Work around a bug in gcc 3.3.5, reported by a user

2006-08-03 00:16:56 +00:00

PHIElimination.cpp

Fix an obvious bug, noticed by inspection. No current targets trigger this.

2006-08-12 05:41:39 +00:00

PhysRegTracker.h

…

PrologEpilogInserter.cpp

…

RegAllocLinearScan.cpp

Final polish on machine pass registries.

2006-08-02 12:30:23 +00:00

RegAllocLocal.cpp

Final polish on machine pass registries.

2006-08-02 12:30:23 +00:00

RegAllocSimple.cpp

Final polish on machine pass registries.

2006-08-02 12:30:23 +00:00

TwoAddressInstructionPass.cpp

…

UnreachableBlockElim.cpp

…

VirtRegMap.cpp

Added a check so that if we have two machine instructions in this form

2006-08-21 07:33:33 +00:00

VirtRegMap.h

…