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https://github.com/c64scene-ar/llvm-6502.git
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f2f6ce65b7
input filename so that opt doesn't print the input filename in the output so that grep lines in the tests don't unintentionally match strings in the input filename. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81537 91177308-0d34-0410-b5e6-96231b3b80d8
140 lines
5.0 KiB
LLVM
140 lines
5.0 KiB
LLVM
; Test the edge profiling instrumentation.
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; RUN: opt < %s -insert-edge-profiling -S | FileCheck %s
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; ModuleID = '<stdin>'
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@.str = private constant [12 x i8] c"hello world\00", align 1 ; <[12 x i8]*> [#uses=1]
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@.str1 = private constant [6 x i8] c"franz\00", align 1 ; <[6 x i8]*> [#uses=1]
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@.str2 = private constant [9 x i8] c"argc > 2\00", align 1 ; <[9 x i8]*> [#uses=1]
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@.str3 = private constant [9 x i8] c"argc = 1\00", align 1 ; <[9 x i8]*> [#uses=1]
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@.str4 = private constant [6 x i8] c"fritz\00", align 1 ; <[6 x i8]*> [#uses=1]
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@.str5 = private constant [10 x i8] c"argc <= 1\00", align 1 ; <[10 x i8]*> [#uses=1]
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; CHECK:@EdgeProfCounters
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; CHECK:[19 x i32]
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; CHECK:zeroinitializer
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define void @oneblock() nounwind {
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entry:
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; CHECK:entry:
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; CHECK:%OldFuncCounter
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; CHECK:load
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; CHECK:getelementptr
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; CHECK:@EdgeProfCounters
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; CHECK:i32 0
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; CHECK:i32 0
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; CHECK:%NewFuncCounter
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; CHECK:add
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; CHECK:%OldFuncCounter
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; CHECK:store
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; CHECK:%NewFuncCounter
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; CHECK:getelementptr
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; CHECK:@EdgeProfCounters
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%0 = call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.str, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
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ret void
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}
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declare i32 @puts(i8*)
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define i32 @main(i32 %argc, i8** %argv) nounwind {
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entry:
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; CHECK:entry:
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%argc_addr = alloca i32 ; <i32*> [#uses=4]
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%argv_addr = alloca i8** ; <i8***> [#uses=1]
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%retval = alloca i32 ; <i32*> [#uses=2]
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%j = alloca i32 ; <i32*> [#uses=4]
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%i = alloca i32 ; <i32*> [#uses=4]
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%0 = alloca i32 ; <i32*> [#uses=2]
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; CHECK:call
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; CHECK:@llvm_start_edge_profiling
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; CHECK:@EdgeProfCounters
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store i32 %argc, i32* %argc_addr
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store i8** %argv, i8*** %argv_addr
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store i32 0, i32* %i, align 4
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br label %bb10
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bb: ; preds = %bb10
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; CHECK:bb:
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%1 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
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%2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1]
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br i1 %2, label %bb1, label %bb8
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bb1: ; preds = %bb
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; CHECK:bb1:
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store i32 0, i32* %j, align 4
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br label %bb6
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bb2: ; preds = %bb6
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; CHECK:bb2:
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%3 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
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%4 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
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%5 = icmp sgt i32 %4, 2 ; <i1> [#uses=1]
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br i1 %5, label %bb3, label %bb4
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bb3: ; preds = %bb2
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; CHECK:bb3:
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%6 = call i32 @puts(i8* getelementptr inbounds ([9 x i8]* @.str2, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
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br label %bb5
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bb4: ; preds = %bb2
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; CHECK:bb4:
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%7 = call i32 @puts(i8* getelementptr inbounds ([9 x i8]* @.str3, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
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br label %bb11
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bb5: ; preds = %bb3
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; CHECK:bb5:
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%8 = call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str4, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
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%9 = load i32* %j, align 4 ; <i32> [#uses=1]
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%10 = add nsw i32 %9, 1 ; <i32> [#uses=1]
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store i32 %10, i32* %j, align 4
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br label %bb6
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bb6: ; preds = %bb5, %bb1
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; CHECK:bb6:
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%11 = load i32* %j, align 4 ; <i32> [#uses=1]
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%12 = load i32* %argc_addr, align 4 ; <i32> [#uses=1]
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%13 = icmp slt i32 %11, %12 ; <i1> [#uses=1]
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br i1 %13, label %bb2, label %bb7
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bb7: ; preds = %bb6
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; CHECK:bb7:
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br label %bb9
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bb8: ; preds = %bb
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; CHECK:bb8:
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%14 = call i32 @puts(i8* getelementptr inbounds ([10 x i8]* @.str5, i64 0, i64 0)) nounwind ; <i32> [#uses=0]
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br label %bb9
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bb9: ; preds = %bb8, %bb7
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; CHECK:bb9:
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%15 = load i32* %i, align 4 ; <i32> [#uses=1]
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%16 = add nsw i32 %15, 1 ; <i32> [#uses=1]
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store i32 %16, i32* %i, align 4
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br label %bb10
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bb10: ; preds = %bb9, %entry
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; CHECK:bb10:
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%17 = load i32* %i, align 4 ; <i32> [#uses=1]
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%18 = icmp ne i32 %17, 3 ; <i1> [#uses=1]
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br i1 %18, label %bb, label %bb11
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; CHECK:br
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; CHECK:label %bb10.bb11_crit_edge
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; CHECK:bb10.bb11_crit_edge:
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; CHECK:br
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; CHECK:label %bb11
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bb11: ; preds = %bb10, %bb4
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; CHECK:bb11:
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call void @oneblock() nounwind
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store i32 0, i32* %0, align 4
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%19 = load i32* %0, align 4 ; <i32> [#uses=1]
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store i32 %19, i32* %retval, align 4
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br label %return
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return: ; preds = %bb11
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; CHECK:return:
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%retval12 = load i32* %retval ; <i32> [#uses=1]
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ret i32 %retval12
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}
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