mirror of
https://github.com/c64scene-ar/llvm-6502.git
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a0112d0c39
to load/store i64 values. Since there's no current support to explicitly declare such restrictions, implement it by using specific hardcoded register pairs during isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
839 B
LLVM
34 lines
839 B
LLVM
; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
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%0 = type { i32, i32 }
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; CHECK: f0:
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; CHECK: ldrexd
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define i64 @f0(i8* %p) nounwind readonly {
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entry:
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%ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p)
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%0 = extractvalue %0 %ldrexd, 1
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%1 = extractvalue %0 %ldrexd, 0
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%2 = zext i32 %0 to i64
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%3 = zext i32 %1 to i64
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%shl = shl nuw i64 %2, 32
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%4 = or i64 %shl, %3
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ret i64 %4
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}
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; CHECK: f1:
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; CHECK: strexd
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define i32 @f1(i8* %ptr, i64 %val) nounwind {
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entry:
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%tmp4 = trunc i64 %val to i32
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%tmp6 = lshr i64 %val, 32
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%tmp7 = trunc i64 %tmp6 to i32
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%strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
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ret i32 %strexd
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}
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declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly
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declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
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