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https://github.com/c64scene-ar/llvm-6502.git
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47857812e2
Three changes: 1. Convert signed integer types to signless versions. 2. Implement the @sext and @zext parameter attributes. Previously the type of an function parameter was used to determine whether it should be sign extended or zero extended before the call. This information is now communicated via the function type's parameter attributes. 3. The interface to LowerCallTo had to be changed in order to accommodate the parameter attribute information. Although it would have been convenient to pass in the FunctionType itself, there isn't always one present in the caller. Consequently, a signedness indication for the result type and for each parameter was provided for in the interface to this method. All implementations were changed to make the adjustment necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8
79 lines
2.9 KiB
C++
79 lines
2.9 KiB
C++
//===-- IA64ISelLowering.h - IA64 DAG Lowering Interface --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Duraid Madina and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that IA64 uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_IA64_IA64ISELLOWERING_H
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#define LLVM_TARGET_IA64_IA64ISELLOWERING_H
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "IA64.h"
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namespace llvm {
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namespace IA64ISD {
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enum NodeType {
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// Start the numbering where the builting ops and target ops leave off.
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FIRST_NUMBER = ISD::BUILTIN_OP_END+IA64::INSTRUCTION_LIST_END,
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/// GETFD - the getf.d instruction takes a floating point operand and
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/// returns its 64-bit memory representation as an i64
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GETFD,
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// TODO: explain this hack
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BRCALL,
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// RET_FLAG - Return with a flag operand
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RET_FLAG
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};
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}
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class IA64TargetLowering : public TargetLowering {
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int VarArgsFrameIndex; // FrameIndex for start of varargs area.
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//int ReturnAddrIndex; // FrameIndex for return slot.
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unsigned GP, SP, RP; // FIXME - clean this mess up
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public:
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IA64TargetLowering(TargetMachine &TM);
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unsigned VirtGPR; // this is public so it can be accessed in the selector
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// for ISD::RET. add an accessor instead? FIXME
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const char *getTargetNodeName(unsigned Opcode) const;
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/// LowerArguments - This hook must be implemented to indicate how we should
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/// lower the arguments for the specified function, into the specified DAG.
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virtual std::vector<SDOperand>
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LowerArguments(Function &F, SelectionDAG &DAG);
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/// LowerCallTo - This hook lowers an abstract call to a function into an
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/// actual call.
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virtual std::pair<SDOperand, SDOperand>
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LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned,
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bool isVarArg, unsigned CC, bool isTailCall,
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SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
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/// LowerOperation - for custom lowering specific ops
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/// (currently, only "ret void")
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virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
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virtual std::pair<SDOperand, SDOperand>
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LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
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SelectionDAG &DAG);
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// XXX virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
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// XXX MachineBasicBlock *MBB);
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};
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}
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#endif // LLVM_TARGET_IA64_IA64ISELLOWERING_H
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