llvm-6502/test/CodeGen
Jakob Stoklund Olesen 3e5d5c53a0 Expand V_SET0 to xorps by default.
The xorps instruction is smaller than pxor, so prefer that encoding.

The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 19:15:58 +00:00
..
ARM Add support for passing i1, i8, and i16 call parameters. Also, be sure to 2011-11-05 20:16:15 +00:00
CBackend
CellSPU Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
CPP
Generic
MBlaze
Mips Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
MSP430
PowerPC test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now. 2011-10-28 23:11:03 +00:00
PTX fixed global array handling for ptx to use the correct bit widths 2011-11-03 19:24:46 +00:00
SPARC
Thumb Reapply r143206, with fixes. Disallow physical register lifetimes 2011-11-03 21:49:52 +00:00
Thumb2
X86 Expand V_SET0 to xorps by default. 2011-11-07 19:15:58 +00:00
XCore Don't fold negative offsets into cp / dp accesses to avoid relocation errors. 2011-11-01 11:31:53 +00:00