mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
160 lines
5.6 KiB
ArmAsm
160 lines
5.6 KiB
ArmAsm
; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
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foo:
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;-----------------------------------------------------------------------------
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; Unconditional branch (register) instructions.
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;-----------------------------------------------------------------------------
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ret
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; CHECK: encoding: [0xc0,0x03,0x5f,0xd6]
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ret x1
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; CHECK: encoding: [0x20,0x00,0x5f,0xd6]
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drps
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; CHECK: encoding: [0xe0,0x03,0xbf,0xd6]
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eret
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; CHECK: encoding: [0xe0,0x03,0x9f,0xd6]
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br x5
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; CHECK: encoding: [0xa0,0x00,0x1f,0xd6]
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blr x9
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; CHECK: encoding: [0x20,0x01,0x3f,0xd6]
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bl L1
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; CHECK: bl L1 ; encoding: [A,A,A,0b100101AA]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_call26
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;-----------------------------------------------------------------------------
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; Contitional branch instructions.
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;-----------------------------------------------------------------------------
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b L1
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; CHECK: b L1 ; encoding: [A,A,A,0b000101AA]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch26
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b.eq L1
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; CHECK: b.eq L1 ; encoding: [0bAAA00000,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.ne L1
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; CHECK: b.ne L1 ; encoding: [0bAAA00001,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.cs L1
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; CHECK: b.hs L1 ; encoding: [0bAAA00010,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.cc L1
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; CHECK: b.lo L1 ; encoding: [0bAAA00011,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.mi L1
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; CHECK: b.mi L1 ; encoding: [0bAAA00100,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.pl L1
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; CHECK: b.pl L1 ; encoding: [0bAAA00101,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.vs L1
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; CHECK: b.vs L1 ; encoding: [0bAAA00110,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.vc L1
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; CHECK: b.vc L1 ; encoding: [0bAAA00111,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.hi L1
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; CHECK: b.hi L1 ; encoding: [0bAAA01000,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.ls L1
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; CHECK: b.ls L1 ; encoding: [0bAAA01001,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.ge L1
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; CHECK: b.ge L1 ; encoding: [0bAAA01010,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.lt L1
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; CHECK: b.lt L1 ; encoding: [0bAAA01011,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.gt L1
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; CHECK: b.gt L1 ; encoding: [0bAAA01100,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.le L1
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; CHECK: b.le L1 ; encoding: [0bAAA01101,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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b.al L1
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; CHECK: b.al L1 ; encoding: [0bAAA01110,A,A,0x54]
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; CHECK: fixup A - offset: 0, value: L1, kind: fixup_aarch64_pcrel_branch19
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L1:
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b #28
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; CHECK: b #28
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b.lt #28
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; CHECK: b.lt #28
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b.cc #1048572
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; CHECK: b.lo #1048572 ; encoding: [0xe3,0xff,0x7f,0x54]
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b #134217724
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; CHECK: b #134217724 ; encoding: [0xff,0xff,0xff,0x15]
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b #-134217728
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; CHECK: b #-134217728 ; encoding: [0x00,0x00,0x00,0x16]
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;-----------------------------------------------------------------------------
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; Compare-and-branch instructions.
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;-----------------------------------------------------------------------------
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cbz w1, foo
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; CHECK: encoding: [0bAAA00001,A,A,0x34]
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cbz x1, foo
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; CHECK: encoding: [0bAAA00001,A,A,0xb4]
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cbnz w2, foo
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; CHECK: encoding: [0bAAA00010,A,A,0x35]
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cbnz x2, foo
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; CHECK: encoding: [0bAAA00010,A,A,0xb5]
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cbz w1, #28
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; CHECK: cbz w1, #28
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cbz w20, #1048572
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; CHECK: cbz w20, #1048572 ; encoding: [0xf4,0xff,0x7f,0x34]
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cbnz x2, #-1048576
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; CHECK: cbnz x2, #-1048576 ; encoding: [0x02,0x00,0x80,0xb5]
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;-----------------------------------------------------------------------------
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; Bit-test-and-branch instructions.
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;-----------------------------------------------------------------------------
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tbz x1, #3, foo
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; CHECK: encoding: [0bAAA00001,A,0b00011AAA,0x36]
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tbnz x1, #63, foo
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; CHECK: encoding: [0bAAA00001,A,0b11111AAA,0xb7]
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tbz w1, #3, foo
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; CHECK: encoding: [0bAAA00001,A,0b00011AAA,0x36]
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tbnz w1, #31, foo
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; CHECK: encoding: [0bAAA00001,A,0b11111AAA,0x37]
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tbz w1, #3, #28
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; CHECK: tbz w1, #3, #28
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tbz w3, #5, #32764
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; CHECK: tbz w3, #5, #32764 ; encoding: [0xe3,0xff,0x2b,0x36]
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tbnz x3, #8, #-32768
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; CHECK: tbnz w3, #8, #-32768 ; encoding: [0x03,0x00,0x44,0x37]
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;-----------------------------------------------------------------------------
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; Exception generation instructions.
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;-----------------------------------------------------------------------------
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brk #1
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; CHECK: encoding: [0x20,0x00,0x20,0xd4]
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dcps1 #2
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; CHECK: encoding: [0x41,0x00,0xa0,0xd4]
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dcps2 #3
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; CHECK: encoding: [0x62,0x00,0xa0,0xd4]
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dcps3 #4
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; CHECK: encoding: [0x83,0x00,0xa0,0xd4]
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hlt #5
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; CHECK: encoding: [0xa0,0x00,0x40,0xd4]
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hvc #6
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; CHECK: encoding: [0xc2,0x00,0x00,0xd4]
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smc #7
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; CHECK: encoding: [0xe3,0x00,0x00,0xd4]
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svc #8
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; CHECK: encoding: [0x01,0x01,0x00,0xd4]
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; The immediate defaults to zero for DCPSn
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dcps1
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dcps2
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dcps3
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; CHECK: dcps1 ; encoding: [0x01,0x00,0xa0,0xd4]
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; CHECK: dcps2 ; encoding: [0x02,0x00,0xa0,0xd4]
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; CHECK: dcps3 ; encoding: [0x03,0x00,0xa0,0xd4]
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