llvm-6502/include/llvm/CodeGen
NAKAMURA Takumi 32e0662db3 CallingConvLower.h: Use bitfields like unsigned:1 instead of bool:1 .
Some compilers might be confused if bool were potentially signed integer. In my case, g++-4.7.0 miscompiled CodeGen/ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171727 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07 11:13:51 +00:00
..
PBQP
Analysis.h
AsmPrinter.h
CalcSpillWeights.h
CallingConvLower.h CallingConvLower.h: Use bitfields like unsigned:1 instead of bool:1 . 2013-01-07 11:13:51 +00:00
CommandFlags.h
DAGCombine.h
DFAPacketizer.h
EdgeBundles.h
FastISel.h
FunctionLoweringInfo.h
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h
JITCodeEmitter.h
LatencyPriorityQueue.h
LexicalScopes.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
LiveInterval.h
LiveIntervalAnalysis.h
LiveIntervalUnion.h
LiveRangeEdit.h
LiveRegMatrix.h
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h
MachineBlockFrequencyInfo.h
MachineBranchProbabilityInfo.h
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionAnalysis.h
MachineFunctionPass.h
MachineInstr.h
MachineInstrBuilder.h
MachineInstrBundle.h
MachineJumpTableInfo.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h
MachinePassRegistry.h
MachinePostDominators.h
MachineRegisterInfo.h
MachineRelocation.h
MachineScheduler.h
MachineSSAUpdater.h
MachORelocation.h
Passes.h
PseudoSourceValue.h
RegAllocPBQP.h
RegAllocRegistry.h
RegisterClassInfo.h
RegisterPressure.h
RegisterScavenging.h
ResourcePriorityQueue.h
RuntimeLibcalls.h
ScheduleDAG.h
ScheduleDAGInstrs.h
ScheduleDFS.h
ScheduleHazardRecognizer.h
SchedulerRegistry.h
ScoreboardHazardRecognizer.h
SelectionDAG.h
SelectionDAGISel.h
SelectionDAGNodes.h
SlotIndexes.h
TargetLoweringObjectFileImpl.h
TargetSchedule.h
ValueTypes.h
ValueTypes.td
VirtRegMap.h