Juergen Ributzka 3ef392c4e2 [FastISel][AArch64] Use the proper FMOV instruction to materialize a +0.0. ... Use FMOVWSr/FMOVXDr instead of FMOVSr/FMOVDr, which have the proper register class to be used with the zero register. This makes the MachineInstruction verifier happy again. This is related to <rdar://problem/18027157>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216040 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-20 01:10:36 +00:00
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Analysis
AsmParser	Split parseAssembly into parseAssembly and parseAssemblyInto.	2014-08-19 22:05:47 +00:00
Bitcode
CodeGen
DebugInfo
ExecutionEngine	[MCJIT] Allow '$' characters in symbol names in RuntimeDyldChecker.	2014-08-19 20:04:45 +00:00
IR	IR: Implement uselistorder assembly directives	2014-08-19 21:30:15 +00:00
IRReader
LineEditor
Linker
LTO
MC
Object
Option
ProfileData
Support
TableGen
Target	[FastISel][AArch64] Use the proper FMOV instruction to materialize a +0.0.	2014-08-20 01:10:36 +00:00
Transforms	InstCombine: Annotate sub with nsw when we prove it's safe	2014-08-19 23:36:30 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile