Duncan Sands 3ef3fcfc04 Only have codegen turn fdiv by a constant into fmul by the reciprocal ...

when -ffast-math, i.e. don't just always do it if the reciprocal can
be formed exactly.  There is already an IR level transform that does
that, and it does it more carefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154296 91177308-0d34-0410-b5e6-96231b3b80d8

2012-04-08 18:08:12 +00:00

..

CMakeLists.txt

Refactor the SelectionDAG's 'dump' methods into their own .cpp file.

2012-03-13 05:47:27 +00:00

DAGCombiner.cpp

Only have codegen turn fdiv by a constant into fmul by the reciprocal

2012-04-08 18:08:12 +00:00

FastISel.cpp

If we have a VLA that has a "use" in a metadata node that's then used

2012-03-30 00:02:55 +00:00

FunctionLoweringInfo.cpp

…

InstrEmitter.cpp

…

InstrEmitter.h

…

LegalizeDAG.cpp

f16 FREM can now be legalized by promoting to f32

2012-04-04 19:36:31 +00:00

LegalizeFloatTypes.cpp

…

LegalizeIntegerTypes.cpp

Always compute all the bits in ComputeMaskedBits.

2012-04-04 12:51:34 +00:00

LegalizeTypes.cpp

…

LegalizeTypes.h

Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095>

2012-04-03 22:57:55 +00:00

LegalizeTypesGeneric.cpp

…

LegalizeVectorOps.cpp

…

LegalizeVectorTypes.cpp

Removed useless switch for default case when switch was covering all the enum values

2012-04-04 00:53:04 +00:00

LLVMBuild.txt

…

Makefile

…

ResourcePriorityQueue.cpp

misched preparation: rename core scheduler methods for consistency.

2012-03-07 23:00:49 +00:00

ScheduleDAGFast.cpp

Use uint16_t to store instruction implicit uses and defs. Reduces static data.

2012-03-08 08:22:45 +00:00

ScheduleDAGRRList.cpp

Source order scheduler should not preschedule nodes with multiple uses. rdar://11096639

2012-03-22 19:31:17 +00:00

ScheduleDAGSDNodes.cpp

Insert the debugging instructions in one fell-swoop so that it doesn't call the

2012-03-14 07:14:25 +00:00

ScheduleDAGSDNodes.h

misched preparation: rename core scheduler methods for consistency.

2012-03-07 23:00:49 +00:00

ScheduleDAGVLIW.cpp

misched preparation: rename core scheduler methods for consistency.

2012-03-07 23:00:49 +00:00

SDNodeDbgValue.h

…

SDNodeOrdering.h

…

SelectionDAG.cpp

Treat f16 the same as f80/f128 for the purposes of generating constants during instruction selection.

2012-04-05 18:50:32 +00:00

SelectionDAGBuilder.cpp

Simplify code that tries to do vector extracts for shuffles when the mask width and the input vector widths don't match. No need to check the min and max are in range before calculating the start index. The range check after having the start index is sufficient. Also no need to check for an extract from the beginning differently.

2012-04-08 17:53:33 +00:00

SelectionDAGBuilder.h

…

SelectionDAGDumper.cpp

Refactor the SelectionDAG's 'dump' methods into their own .cpp file.

2012-03-13 05:47:27 +00:00

SelectionDAGISel.cpp

Always compute all the bits in ComputeMaskedBits.

2012-04-04 12:51:34 +00:00

SelectionDAGPrinter.cpp

…

TargetLowering.cpp

Move the TLSModel information into the TargetMachine rather than hiding

2012-04-08 17:20:55 +00:00

TargetSelectionDAGInfo.cpp

…