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https://github.com/c64scene-ar/llvm-6502.git
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23dc769a9b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160270 91177308-0d34-0410-b5e6-96231b3b80d8
96 lines
3.9 KiB
TableGen
96 lines
3.9 KiB
TableGen
//===-- AMDILMultiClass.td - AMDIL Multiclass defs ---*- tablegen -*-------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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// Multiclass that handles branch instructions
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multiclass BranchConditional<SDNode Op> {
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def _i32 : ILFormat<IL_OP_IFC, (outs),
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(ins brtarget:$target, GPRI32:$src0),
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"; i32 Pseudo branch instruction",
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[(Op bb:$target, GPRI32:$src0)]>;
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def _f32 : ILFormat<IL_OP_IFC, (outs),
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(ins brtarget:$target, GPRF32:$src0),
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"; f32 Pseudo branch instruction",
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[(Op bb:$target, GPRF32:$src0)]>;
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}
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// Multiclass that handles memory store operations
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multiclass GTRUNCSTORE<string asm> {
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def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(global_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
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def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(global_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
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}
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// Multiclass that handles memory store operations
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multiclass LTRUNCSTORE<string asm> {
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def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(local_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
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def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(local_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
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}
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// Multiclass that handles memory store operations
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multiclass PTRUNCSTORE<string asm> {
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def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(private_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
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def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(private_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
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}
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// Multiclass that handles memory store operations
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multiclass RTRUNCSTORE<string asm> {
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def _i32i8 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(region_i8trunc_store GPRI32:$val, ADDR:$ptr)]>;
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def _i32i16 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(region_i16trunc_store GPRI32:$val, ADDR:$ptr)]>;
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}
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// Multiclass that handles memory store operations
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multiclass STORE<string asm, PatFrag OpNode> {
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def _i32 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRI32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(OpNode GPRI32:$val, ADDR:$ptr)]>;
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def _f32 : OneInOneOut<IL_OP_MOV, (outs), (ins GPRF32:$val, MEMI32:$ptr),
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!strconcat(asm, " $val $ptr"),
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[(OpNode GPRF32:$val, ADDR:$ptr)]>;
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}
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// Multiclass that handles load operations
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multiclass LOAD<string asm, PatFrag OpNode> {
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def _i32 : OneInOneOut<IL_OP_MOV, (outs GPRI32:$dst), (ins MEMI32:$ptr),
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!strconcat(asm, " $dst $ptr"),
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[(set GPRI32:$dst, (OpNode ADDR:$ptr))]>;
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def _f32 : OneInOneOut<IL_OP_MOV, (outs GPRF32:$dst), (ins MEMI32:$ptr),
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!strconcat(asm, " $dst $ptr"),
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[(set GPRF32:$dst, (OpNode ADDR:$ptr))]>;
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}
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// Only scalar types should generate flow control
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multiclass BranchInstr<ILOpCode opc> {
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def _i32 : UnaryOpNoRet<opc, (outs), (ins GPRI32:$src),
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!strconcat(opc.Text, " $src"), []>;
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def _f32 : UnaryOpNoRet<opc, (outs), (ins GPRF32:$src),
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!strconcat(opc.Text, " $src"), []>;
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}
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// Only scalar types should generate flow control
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multiclass BranchInstr2<ILOpCode opc> {
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def _i32 : BinaryOpNoRet<opc, (outs), (ins GPRI32:$src0, GPRI32:$src1),
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!strconcat(opc.Text, " $src0, $src1"), []>;
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def _f32 : BinaryOpNoRet<opc, (outs), (ins GPRF32:$src0, GPRF32:$src1),
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!strconcat(opc.Text, " $src0, $src1"), []>;
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}
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