Jack Carter 2f68b311a1 Initial assembler implementation of Mips load address macro ... This patch provides initial implementation of load address macro instruction for Mips. We have implemented two kinds of expansions with their variations depending on the size of immediate operand: 1) load address with immediate value directly: * la d,j => addiu d,$zero,j (for -32768 <= j <= 65535) * la d,j => lui d,hi16(j) ori d,d,lo16(j) (for any other 32 bit value of j) 2) load load address with register offset value * la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535) * la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j) ori d,d,lo16(j) addu d,d,s This patch does not cover the case when the address is loaded from the value of the label or function. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-09 23:29:45 +00:00
..
do_switch.ll
elf_basic.s
elf-bigendian.ll
elf-N64.ll
elf-objdump.s
elf-relsym.ll
elf-tls.ll
higher_highest.ll
lea_64.ll
lit.local.cfg
mips64extins.ll
mips64shift.ll
mips_directives.s	This patch is a partial implementation of mips .set assembler directive. Directive is defined as follows:	2012-10-04 02:29:46 +00:00
mips-alu-instructions.s	The Mips standalone assembler aliased instruction support.	2012-09-07 01:42:38 +00:00
mips-expansions.s	Initial assembler implementation of Mips load address macro	2012-10-09 23:29:45 +00:00
mips-fpu-instructions.s	Adding support for instructions mfc0, mfc2, mtc0, mtc2	2012-10-06 01:17:37 +00:00
mips-jump-instructions.s	The Mips standalone assembler aliased instruction support.	2012-09-07 01:42:38 +00:00
mips-memory-instructions.s
mips-relocations.s	Initial relocations test for the Mips standalone assembler.	2012-09-07 20:38:18 +00:00
multi-64bit-func.ll
pr11877.s
r-mips-got-disp.ll
sext_64_32.ll
sym-offset.ll