Evan Cheng d37c13cfd1 - Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction. ... - When scavenging a register, in addition to the spill, insert a restore before the first use. - Abort if client is looking to scavenge a register even when a previously scavenged register is still live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59697 91177308-0d34-0410-b5e6-96231b3b80d8		2008-11-20 02:32:35 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-01-31-RegInfoAssert.ll
2007-02-02-JoinIntervalsCrash.ll
2007-03-06-AddR7.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-26-RegScavengerAssert.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-05-InvalidPushPop.ll
2007-05-07-jumptoentry.ll
2007-05-07-tailmerge-1.ll
2007-05-09-tailmerge-2.ll
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll
2007-05-23-BadPreIndexedStore.ll
2007-05-31-RegScavengerInfiniteLoop.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-14-CoaleserBug.ll
2008-09-17-CoalescerBug.ll	Unallocatable registers do not have live intervals.	2008-09-17 18:36:25 +00:00
2008-11-18-ScavengerAssert.ll	Register scavenger should process early clobber defs first. A dead early clobber def should not interfere with a normal def which happens one slot later.	2008-11-18 22:28:38 +00:00
2008-11-19-ScavengerAssert.ll	- Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction.	2008-11-20 02:32:35 +00:00
addrmode.ll
aliases.ll
align.ll
alloca.ll
argaddr.ll
arguments.ll
arm-asm.ll
arm-negative-stride.ll
bits.ll
branch.ll
bx_fold.ll
call_nolink.ll
call.ll
clz.ll
compare-call.ll
constants.ll
cse-libcalls.ll	Re-enable SelectionDAG CSE for calls. It matters in the case of	2008-09-15 19:46:03 +00:00
ctors_dtors.ll
dg.exp
div.ll
dyn-stackalloc.ll
extloadi1.ll
fcopysign.ll
fixunsdfdi.ll	Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.	2008-11-04 19:57:48 +00:00
fmdrr-fmrrd.ll
fnmul.ll
fp.ll
fparith.ll
fpcmp_ueq.ll
fpcmp.ll
fpconv.ll
fpmem.ll
fpow.ll	Implement function notes as function attributes.	2008-09-26 23:51:19 +00:00
fpowi.ll
fptoint.ll
frame_thumb.ll
hello.ll
iabs.ll
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
ifcvt8.ll
illegal-vector-bitcast.ll
imm.ll
inlineasm2.ll
inlineasm.ll
insn-sched1.ll
ispositive.ll
large-stack.ll
ldm.ll
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
load-global.ll
load.ll
long_shift.ll
long-setcc.ll
long.ll
lsr-code-insertion.ll
lsr-scale-addr-mode.ll
mem.ll
memcpy-inline.ll
memfunc.ll
mul.ll
mulhi.ll
mvn.ll
pack.ll
remat.ll
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_void.ll
rev.ll
section.ll
select_xform.ll
select.ll
shifter_operand.ll
smul.ll
stack-frame.ll
str_post.ll
str_pre.ll
str_trunc.ll
sxt_rot.ll
thread_pointer.ll
thumb-imm.ll
tls1.ll
tls2.ll
tls3.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
uint64tof64.ll	Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.	2008-11-04 22:19:55 +00:00
unaligned_load_store.ll
unord.ll
uxt_rot.ll
uxtb.ll
vargs2.ll
vargs_align.ll
vargs.ll
vfp.ll
weak2.ll
weak.ll