Andrew Trick 5469976506 Added a check in the preRA scheduler for potential interference on a ...

induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.

Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129100 91177308-0d34-0410-b5e6-96231b3b80d8

2011-04-07 19:54:57 +00:00

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Analysis

PR9634: Don't unconditionally tell the AliasSetTracker that the PreheaderLoad

2011-04-07 01:35:06 +00:00

Archive

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Assembler

Remove some support for ReturnInsts with multiple operands, and for

2011-04-04 07:44:02 +00:00

Bindings/Ocaml

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Bitcode

Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends

2011-03-29 23:06:19 +00:00

BugPoint

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CodeGen

Added a check in the preRA scheduler for potential interference on a

2011-04-07 19:54:57 +00:00

DebugInfo

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ExecutionEngine

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Feature

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FrontendAda

Will not compile without the spec!

2011-03-31 10:03:32 +00:00

FrontendC

Testcase for r128619 (PR9571).

2011-03-31 08:13:57 +00:00

FrontendC++

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FrontendFortran

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FrontendObjC

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FrontendObjC++

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Integer

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lib

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Linker

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LLVMC

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MC

Add sanity checking for invalid register encodings for signed/unsigned extend instructions.

2011-04-07 19:28:58 +00:00

Object

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Other

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Scripts

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TableGen

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Transforms

While hoisting common code from if/else, hoist debug info intrinsics if they match.

2011-04-07 17:27:36 +00:00

Unit

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Verifier

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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Makefile

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Makefile.tests

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site.exp.in

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TestRunner.sh

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