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__builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end. __builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load. We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77917 91177308-0d34-0410-b5e6-96231b3b80d8
35 lines
1.2 KiB
TableGen
35 lines
1.2 KiB
TableGen
//===- IntrinsicsBlackfin.td - Defines Blackfin intrinsics -*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines all of the blackfin-specific intrinsics.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Core synchronisation etc.
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//
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// These intrinsics have sideeffects. Each represent a single instruction, but
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// workarounds are sometimes required depending on the cpu.
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let TargetPrefix = "bfin" in {
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// Execute csync instruction with workarounds
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def int_bfin_csync : GCCBuiltin<"__builtin_bfin_csync">,
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Intrinsic<[llvm_void_ty]>;
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// Execute ssync instruction with workarounds
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def int_bfin_ssync : GCCBuiltin<"__builtin_bfin_ssync">,
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Intrinsic<[llvm_void_ty]>;
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// Execute idle instruction with workarounds
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def int_bfin_idle : GCCBuiltin<"__builtin_bfin_idle">,
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Intrinsic<[llvm_void_ty]>;
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}
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