llvm-6502/lib
Christopher Lamb 3feb0170a8 Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 06:12:08 +00:00
..
Analysis
Archive
AsmParser Update the .cvs files to match today's asm syntax change. 2008-03-10 05:01:34 +00:00
Bitcode
CodeGen Allow insert_subreg into implicit, target-specific values. 2008-03-10 06:12:08 +00:00
Debugger
ExecutionEngine
Linker Fix some compilation errors on msvc: 2008-03-09 18:32:50 +00:00
Support
System
Target Allow insert_subreg into implicit, target-specific values. 2008-03-10 06:12:08 +00:00
Transforms Turn unwind_to into "unwinds to". 2008-03-10 02:20:00 +00:00
VMCore Turn unwind_to into "unwinds to". 2008-03-10 02:20:00 +00:00
Makefile