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of complex instruction operands (e.g. address modes). Currently, if a Pat pattern creates an instruction that has a complex operand (i.e. one that consists of multiple sub-operands at the MI level), this operand must match a ComplexPattern DAG pattern with the correct number of output operands. This commit extends TableGen to alternatively allow match a complex operands against multiple separate operands at the DAG level. This allows using Pat patterns to match pre-increment nodes like pre_store (which must have separate operands at the DAG level) onto an instruction pattern that uses a multi-operand memory operand, like the following example on PowerPC (will be committed as a follow-on patch): def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, memri:$dst), "stwu $rS, $dst", LdStStoreUpd, []>, RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff), (STWU GPRC:$rS, iaddroff:$ptroff, ptr_rc:$ptrreg)>; Here, the pair of "ptroff" and "ptrreg" operands is matched onto the complex operand "dst" of class "memri" in the "STWU" instruction. Approved by Jakob Stoklund Olesen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177428 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AsmMatcherEmitter.cpp | ||
AsmWriterEmitter.cpp | ||
AsmWriterInst.cpp | ||
AsmWriterInst.h | ||
CallingConvEmitter.cpp | ||
CMakeLists.txt | ||
CodeEmitterGen.cpp | ||
CodeGenDAGPatterns.cpp | ||
CodeGenDAGPatterns.h | ||
CodeGenInstruction.cpp | ||
CodeGenInstruction.h | ||
CodeGenIntrinsics.h | ||
CodeGenMapTable.cpp | ||
CodeGenRegisters.cpp | ||
CodeGenRegisters.h | ||
CodeGenSchedule.cpp | ||
CodeGenSchedule.h | ||
CodeGenTarget.cpp | ||
CodeGenTarget.h | ||
DAGISelEmitter.cpp | ||
DAGISelMatcher.cpp | ||
DAGISelMatcher.h | ||
DAGISelMatcherEmitter.cpp | ||
DAGISelMatcherGen.cpp | ||
DAGISelMatcherOpt.cpp | ||
DFAPacketizerEmitter.cpp | ||
DisassemblerEmitter.cpp | ||
FastISelEmitter.cpp | ||
FixedLenDecoderEmitter.cpp | ||
InstrInfoEmitter.cpp | ||
IntrinsicEmitter.cpp | ||
LLVMBuild.txt | ||
Makefile | ||
OptParserEmitter.cpp | ||
PseudoLoweringEmitter.cpp | ||
RegisterInfoEmitter.cpp | ||
SequenceToOffsetTable.h | ||
SetTheory.cpp | ||
SetTheory.h | ||
StringToOffsetTable.h | ||
SubtargetEmitter.cpp | ||
TableGen.cpp | ||
TableGenBackends.h | ||
TGValueTypes.cpp | ||
X86DisassemblerShared.h | ||
X86DisassemblerTables.cpp | ||
X86DisassemblerTables.h | ||
X86ModRMFilters.cpp | ||
X86ModRMFilters.h | ||
X86RecognizableInstr.cpp | ||
X86RecognizableInstr.h |