llvm-6502/test
Bradley Smith 4fe6d075d5 [ARM] Add missing M/R class CPUs
Add some of the missing M and R class Cortex CPUs, namely:

Cortex-M0+ (called Cortex-M0plus for GCC compatibility)
Cortex-M1
SC000
SC300
Cortex-R5


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229660 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-18 10:33:30 +00:00
..
Analysis Revert r229622: "[LoopAccesses] Make VectorizerParams global" and others. r229622 brought cyclic dependencies between Analysis and Vector. 2015-02-18 08:34:47 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen [ARM] Add missing M/R class CPUs 2015-02-18 10:33:30 +00:00
DebugInfo
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC [SystemZ] Support all TLS access models - MC part 2015-02-18 09:11:36 +00:00
Object
Other
SymbolRewriter
TableGen
tools
Transforms Minor fix after 229495. 2015-02-18 08:09:28 +00:00
Unit
Verifier Testing commit access 2015-02-18 09:11:50 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh