Elena Demikhovsky 40e071c1eb Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183626 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-09 07:37:10 +00:00
..
AArch64	Change how we iterate over relocations on ELF.	2013-05-30 03:05:14 +00:00
ARM	Reapply r183552. This time, use a standard type for the option to avoid template	2013-06-08 00:07:54 +00:00
CPP
Generic	Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen.	2013-05-21 14:37:16 +00:00
Hexagon	Hexagon: Pass to replace tranfer/copy instructions into combine instruction	2013-05-14 18:54:06 +00:00
Inputs
MBlaze
Mips	Teach AsmPrinter how to print odd constants.	2013-06-07 18:36:03 +00:00
MSP430	DAGCombiner: Simplify inverted bit tests	2013-05-08 06:44:42 +00:00
NVPTX	[NVPTX] Re-enable support for virtual registers in the final output	2013-05-31 12:14:49 +00:00
PowerPC	Disallow i64 div/rem in PPC32 counter loops	2013-06-07 22:16:19 +00:00
R600	R600: Anti dep better handled in tex clause	2013-06-07 23:30:26 +00:00
SI
SPARC	[Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.	2013-06-08 15:32:59 +00:00
SystemZ	[SystemZ] Don't use LOAD and STORE REVERSED for volatile accesses	2013-05-31 13:25:22 +00:00
Thumb	LocalStackSlotAllocation improvements	2013-04-30 20:04:37 +00:00
Thumb2	Cortex-R5 can issue Thumb2 integer division instructions.	2013-06-04 22:52:09 +00:00
X86	Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff.	2013-06-09 07:37:10 +00:00
XCore	[XCore] Fix handling of functions where only the LR is spilled.	2013-05-09 16:43:42 +00:00