Alex Lorenz 40fefe0084 MIR Parser: Add support for quoted named global value operands. ... This commit extends the machine instruction lexer and implements support for the quoted global value tokens. With this change the syntax for the global value identifier tokens becomes identical to the syntax for the global identifier tokens from the LLVM's assembly language. Reviewers: Duncan P. N. Exon Smith git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242702 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-20 20:31:01 +00:00
..
AArch64	[AArch64] Change EON pattern to match more often.	2015-07-20 18:42:27 +00:00
AMDGPU	AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops	2015-07-20 14:28:41 +00:00
ARM	ARM: Enable MachineScheduler and disable PostRAScheduler for swift.	2015-07-17 23:18:30 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Generate instructions for operations on predicate registers	2015-07-14 19:30:21 +00:00
Inputs
Mips	[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy)	2015-07-15 08:39:35 +00:00
MIR	MIR Parser: Add support for quoted named global value operands.	2015-07-20 20:31:01 +00:00
MSP430
NVPTX	Use inbounds GEPs for memcpy and memset lowering	2015-07-17 16:42:33 +00:00
PowerPC	Add missing test for r242296 (vec_sld)	2015-07-20 15:43:21 +00:00
SPARC
SystemZ
Thumb
Thumb2	ARM: Add scheduling information for LDRLIT instructions to swift scheduling model	2015-07-17 23:18:26 +00:00
WebAssembly
WinEH	[WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name	2015-07-13 17:55:14 +00:00
X86	[X86][SSE] Tidied up vector CTLZ/CTTZ. NFCI.	2015-07-19 17:09:43 +00:00
XCore