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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
67 lines
4.0 KiB
LLVM
67 lines
4.0 KiB
LLVM
; RUN: llc -O3 < %s | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
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target triple = "thumbv7-apple-darwin10"
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; This test should not produce any spills, even when tail duplication creates lots of phi nodes.
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; CHECK-NOT: push
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; CHECK-NOT: pop
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; CHECK: bx lr
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@codetable.2928 = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5]
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@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
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entry:
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%0 = load i8, i8* %opcodes, align 1 ; <i8> [#uses=1]
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%1 = zext i8 %0 to i32 ; <i32> [#uses=1]
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%2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %1 ; <i8**> [#uses=1]
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br label %bb
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bb: ; preds = %bb.backedge, %entry
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%indvar = phi i32 [ %phitmp, %bb.backedge ], [ 1, %entry ] ; <i32> [#uses=2]
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%gotovar.22.0.in = phi i8** [ %gotovar.22.0.in.be, %bb.backedge ], [ %2, %entry ] ; <i8**> [#uses=1]
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%result.0 = phi i32 [ %result.0.be, %bb.backedge ], [ 0, %entry ] ; <i32> [#uses=6]
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%opcodes_addr.0 = getelementptr i8, i8* %opcodes, i32 %indvar ; <i8*> [#uses=4]
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%gotovar.22.0 = load i8*, i8** %gotovar.22.0.in, align 4 ; <i8*> [#uses=1]
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indirectbr i8* %gotovar.22.0, [label %RETURN, label %INCREMENT, label %DECREMENT, label %DOUBLE, label %SWAPWORD]
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RETURN: ; preds = %bb
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ret i32 %result.0
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INCREMENT: ; preds = %bb
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%3 = add nsw i32 %result.0, 1 ; <i32> [#uses=1]
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%4 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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%5 = zext i8 %4 to i32 ; <i32> [#uses=1]
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%6 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %5 ; <i8**> [#uses=1]
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br label %bb.backedge
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bb.backedge: ; preds = %SWAPWORD, %DOUBLE, %DECREMENT, %INCREMENT
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%gotovar.22.0.in.be = phi i8** [ %20, %SWAPWORD ], [ %14, %DOUBLE ], [ %10, %DECREMENT ], [ %6, %INCREMENT ] ; <i8**> [#uses=1]
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%result.0.be = phi i32 [ %17, %SWAPWORD ], [ %11, %DOUBLE ], [ %7, %DECREMENT ], [ %3, %INCREMENT ] ; <i32> [#uses=1]
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%phitmp = add i32 %indvar, 1 ; <i32> [#uses=1]
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br label %bb
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DECREMENT: ; preds = %bb
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%7 = add i32 %result.0, -1 ; <i32> [#uses=1]
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%8 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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%9 = zext i8 %8 to i32 ; <i32> [#uses=1]
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%10 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %9 ; <i8**> [#uses=1]
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br label %bb.backedge
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DOUBLE: ; preds = %bb
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%11 = shl i32 %result.0, 1 ; <i32> [#uses=1]
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%12 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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%13 = zext i8 %12 to i32 ; <i32> [#uses=1]
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%14 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %13 ; <i8**> [#uses=1]
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br label %bb.backedge
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SWAPWORD: ; preds = %bb
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%15 = shl i32 %result.0, 16 ; <i32> [#uses=1]
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%16 = ashr i32 %result.0, 16 ; <i32> [#uses=1]
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%17 = or i32 %15, %16 ; <i32> [#uses=1]
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%18 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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%19 = zext i8 %18 to i32 ; <i32> [#uses=1]
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%20 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %19 ; <i8**> [#uses=1]
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br label %bb.backedge
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}
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