mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
661 B
LLVM
25 lines
661 B
LLVM
; RUN: llc < %s -march=arm64 | FileCheck %s
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define void @caller(i32* nocapture %p, i32 %a, i32 %b) nounwind optsize ssp {
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; CHECK-NOT: stp
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; CHECK: b {{_callee|callee}}
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; CHECK-NOT: ldp
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; CHECK: ret
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%1 = icmp eq i32 %b, 0
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br i1 %1, label %3, label %2
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tail call fastcc void @callee(i32* %p, i32 %a) optsize
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br label %3
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ret void
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}
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define internal fastcc void @callee(i32* nocapture %p, i32 %a) nounwind optsize noinline ssp {
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store volatile i32 %a, i32* %p, align 4, !tbaa !0
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ret void
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}
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!0 = metadata !{metadata !"int", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA"}
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