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redundant after the change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23759 91177308-0d34-0410-b5e6-96231b3b80d8
146 lines
5.3 KiB
C++
146 lines
5.3 KiB
C++
//===-- PPCBranchSelector.cpp - Emit long conditional branches-----*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Baegeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a pass that scans a machine function to determine which
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// conditional branches need more than 16 bits of displacement to reach their
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// target basic block. It does this in two passes; a calculation of basic block
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// positions pass, and a branch psuedo op to machine branch opcode pass. This
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// pass should be run last, just before the assembly printer.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "bsel"
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#include "PPC.h"
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#include "PPCInstrBuilder.h"
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#include "PPCInstrInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Support/Debug.h"
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#include <map>
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using namespace llvm;
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namespace {
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struct BSel : public MachineFunctionPass {
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// OffsetMap - Mapping between BB and byte offset from start of function
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std::map<MachineBasicBlock*, unsigned> OffsetMap;
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/// bytesForOpcode - A convenience function for totalling up the number of
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/// bytes in a basic block.
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///
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static unsigned bytesForOpcode(unsigned opcode) {
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switch (opcode) {
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case PPC::COND_BRANCH:
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// while this will be 4 most of the time, if we emit 12 it is just a
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// minor pessimization that saves us from having to worry about
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// keeping the offsets up to date later when we emit long branch glue.
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return 12;
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case PPC::IMPLICIT_DEF_GPR: // no asm emitted
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case PPC::IMPLICIT_DEF_F4: // no asm emitted
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case PPC::IMPLICIT_DEF_F8: // no asm emitted
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return 0;
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default:
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break;
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}
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return 4; // PowerPC instructions are all 4 bytes
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}
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virtual bool runOnMachineFunction(MachineFunction &Fn) {
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// Running total of instructions encountered since beginning of function
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unsigned ByteCount = 0;
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// For each MBB, add its offset to the offset map, and count up its
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// instructions
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for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
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++MFI) {
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MachineBasicBlock *MBB = MFI;
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OffsetMap[MBB] = ByteCount;
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for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
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MBBI != EE; ++MBBI)
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ByteCount += bytesForOpcode(MBBI->getOpcode());
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}
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// We're about to run over the MBB's again, so reset the ByteCount
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ByteCount = 0;
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// For each MBB, find the conditional branch pseudo instructions, and
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// calculate the difference between the target MBB and the current ICount
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// to decide whether or not to emit a short or long branch.
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//
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// short branch:
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// bCC .L_TARGET_MBB
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//
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// long branch:
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// bInverseCC $PC+8
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// b .L_TARGET_MBB
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// b .L_FALLTHROUGH_MBB
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for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
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++MFI) {
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MachineBasicBlock *MBB = MFI;
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for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
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MBBI != EE; ++MBBI) {
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// We may end up deleting the MachineInstr that MBBI points to, so
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// remember its opcode now so we can refer to it after calling erase()
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unsigned OpcodeToReplace = MBBI->getOpcode();
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if (OpcodeToReplace == PPC::COND_BRANCH) {
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MachineBasicBlock::iterator MBBJ = MBBI;
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++MBBJ;
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// condbranch operands:
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// 0. CR0 register
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// 1. bc opcode
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// 2. target MBB
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// 3. fallthrough MBB
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MachineBasicBlock *trueMBB =
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MBBI->getOperand(2).getMachineBasicBlock();
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MachineBasicBlock *falseMBB =
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MBBI->getOperand(3).getMachineBasicBlock();
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int Displacement = OffsetMap[trueMBB] - ByteCount;
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unsigned Opcode = MBBI->getOperand(1).getImmedValue();
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unsigned CRReg = MBBI->getOperand(0).getReg();
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unsigned Inverted = PPCInstrInfo::invertPPCBranchOpcode(Opcode);
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if (Displacement >= -32768 && Displacement <= 32767) {
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BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
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} else {
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BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addSImm(8);
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BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
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BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(falseMBB);
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}
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// Erase the psuedo COND_BRANCH instruction, and then back up the
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// iterator so that when the for loop increments it, we end up in
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// the correct place rather than iterating off the end.
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MBB->erase(MBBI);
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MBBI = --MBBJ;
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}
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ByteCount += bytesForOpcode(OpcodeToReplace);
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}
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}
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OffsetMap.clear();
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return true;
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}
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virtual const char *getPassName() const {
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return "PowerPC Branch Selection";
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}
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};
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}
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/// createPPCBranchSelectionPass - returns an instance of the Branch Selection
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/// Pass
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///
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FunctionPass *llvm::createPPCBranchSelectionPass() {
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return new BSel();
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}
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