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https://github.com/c64scene-ar/llvm-6502.git
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1b6f5a29ab
ARM paired GPR COPY was being lowered to two MOVr without CC. This patch puts the CC back. My test is a reduction of the case where I encountered the issue, 64-bit atomics use paired GPRs. The issue only occurs with selectionDAG, FastISel doesn't encounter it so I didn't bother calling it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186226 91177308-0d34-0410-b5e6-96231b3b80d8
18 lines
431 B
LLVM
18 lines
431 B
LLVM
; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -verify-machineinstrs
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define void @f() {
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%a = alloca i8, i32 8, align 8
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%b = alloca i8, i32 8, align 8
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%c = bitcast i8* %a to i64*
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%d = bitcast i8* %b to i64*
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store atomic i64 0, i64* %c seq_cst, align 8
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store atomic i64 0, i64* %d seq_cst, align 8
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%e = load atomic i64* %d seq_cst, align 8
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ret void
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}
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