llvm-6502/test/CodeGen/Mips/analyzebranch.ll
Daniel Sanders 1f4c755c2c [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6
Summary:
Also tightened up the acceptable condition operand for these instructions
on MIPS-I to MIPS-III. Support for $fcc[1-7] was added in MIPS-IV. Prior
to that only $fcc0 is acceptable.

We currently don't optimize (BEQZ (NOT $a), $target) and similar. It's
probably best to do this in InstCombine.

Depends on D4111

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 15:00:17 +00:00

70 lines
2.5 KiB
LLVM

; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=FCC
; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=FCC
; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR -check-prefix=32-GPR
; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefix=ALL -check-prefix=FCC
; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=FCC
; RUN: llc -march=mips64 -mcpu=mips64r2 < %s | FileCheck %s -check-prefix=ALL -check-prefix=FCC
; RUN: llc -march=mips64 -mcpu=mips64r6 < %s | FileCheck %s -check-prefix=ALL -check-prefix=GPR -check-prefix=64-GPR
define double @foo(double %a, double %b) nounwind readnone {
entry:
; ALL-LABEL: foo:
; FCC: bc1f $BB
; FCC: nop
; 32-GPR: mtc1 $zero, $[[Z:f[0-9]]]
; 32-GPR: mthc1 $zero, $[[Z:f[0-9]]]
; 64-GPR: dmtc1 $zero, $[[Z:f[0-9]]]
; GPR: cmp.olt.d $[[FGRCC:f[0-9]+]], $[[Z]], $f12
; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC]]
; GPR-NOT: not $[[GPRCC]], $[[GPRCC]]
; GPR: bnez $[[GPRCC]], $BB
%cmp = fcmp ogt double %a, 0.000000e+00
br i1 %cmp, label %if.end6, label %if.else
if.else: ; preds = %entry
%cmp3 = fcmp ogt double %b, 0.000000e+00
br i1 %cmp3, label %if.end6, label %return
if.end6: ; preds = %if.else, %entry
%c.0 = phi double [ %a, %entry ], [ 0.000000e+00, %if.else ]
%sub = fsub double %b, %c.0
%mul = fmul double %sub, 2.000000e+00
br label %return
return: ; preds = %if.else, %if.end6
%retval.0 = phi double [ %mul, %if.end6 ], [ 0.000000e+00, %if.else ]
ret double %retval.0
}
define void @f1(float %f) nounwind {
entry:
; ALL-LABEL: f1:
; FCC: bc1f $BB
; FCC: nop
; GPR: mtc1 $zero, $[[Z:f[0-9]]]
; GPR: cmp.eq.s $[[FGRCC:f[0-9]+]], $f12, $[[Z]]
; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC]]
; GPR-NOT: not $[[GPRCC]], $[[GPRCC]]
; GPR: beqz $[[GPRCC]], $BB
%cmp = fcmp une float %f, 0.000000e+00
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @abort() noreturn
unreachable
if.end: ; preds = %entry
tail call void (...)* @f2() nounwind
ret void
}
declare void @abort() noreturn nounwind
declare void @f2(...)