llvm-6502/test/CodeGen
Alexei Starovoitov 4193093152 [bpf] add support for bpf pseudo instruction
Expose bpf pseudo load instruction via intrinsic. It is used by front-ends that
can encode file descriptors directly into IR instead of relying on relocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 18:51:42 +00:00
..
AArch64 Complete the MachineScheduler fix made way back in r210390. 2015-03-27 06:10:13 +00:00
ARM Complete the MachineScheduler fix made way back in r210390. 2015-03-27 06:10:13 +00:00
BPF [bpf] add support for bpf pseudo instruction 2015-03-27 18:51:42 +00:00
CPP
Generic LLParser: Require non-null scope for MDLocation and MDLocalVariable 2015-03-27 17:56:39 +00:00
Hexagon [Hexagon] Add support for vector instructions 2015-03-19 16:33:08 +00:00
Inputs
Mips [mips] Support 16-bit offsets for 'm' inline assembly memory constraint. 2015-03-24 15:19:14 +00:00
MSP430
NVPTX Add support for __nvvm_reflect changes in libdevice in CUDA-7.0 2015-03-19 17:05:35 +00:00
PowerPC Complete the MachineScheduler fix made way back in r210390. 2015-03-27 06:10:13 +00:00
R600 Complete the MachineScheduler fix made way back in r210390. 2015-03-27 06:10:13 +00:00
SPARC
SystemZ
Thumb [ARM] Fix handling of thumb1 out-of-range frame offsets 2015-03-20 17:20:07 +00:00
Thumb2 Fix a nasty bug in DAGCombine of STORE nodes. 2015-03-19 22:48:57 +00:00
WinEH WinEH: Create a parent frame alloca for HandlerType xdata tables 2015-03-27 04:17:07 +00:00
X86 [RegisterCoalescer] Refine the terminal rule to still consider the terminal 2015-03-27 18:37:15 +00:00
XCore