Bruno Cardoso Lopes 4201ecae92 Add AVX 128-bit patterns for sint_to_fp ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135332 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-16 00:50:20 +00:00
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Alpha
ARM	Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler.	2011-07-15 18:46:47 +00:00
Blackfin	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CBackend	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CellSPU
CPP
Generic	Comment correction.	2011-07-12 03:39:22 +00:00
MBlaze
Mips	Change the chain input of nodes that load the address of a function. This change	2011-06-24 19:01:25 +00:00
MSP430
PowerPC	test/CodeGen/PowerPC/vector.ll: Tweak redirection >%t >%t to >%t >>%t. See also r134814 (test/CodeGen/X86/vector.ll).	2011-07-11 16:21:52 +00:00
PTX	PTX: corrected tests that were failing	2011-06-25 19:41:17 +00:00
SPARC
SystemZ
Thumb	Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.	2011-07-07 03:55:05 +00:00
Thumb2	Improve codegen for select's:	2011-07-13 00:42:17 +00:00
X86	Add AVX 128-bit patterns for sint_to_fp	2011-07-16 00:50:20 +00:00
XCore