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37ef65b9c1
and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174358 91177308-0d34-0410-b5e6-96231b3b80d8
13 lines
253 B
LLVM
13 lines
253 B
LLVM
; RUN: llc -march=mipsel < %s | FileCheck %s
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declare i8* @llvm.frameaddress(i32) nounwind readnone
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define i8* @f() nounwind {
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entry:
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%0 = call i8* @llvm.frameaddress(i32 0)
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ret i8* %0
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; CHECK: move $fp, $sp
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; CHECK: or $2, $fp, $zero
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}
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