mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-20 11:29:24 +00:00
972f5896e4
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.4 KiB
C++
64 lines
2.4 KiB
C++
//===- Mips.td - Describe the Mips Target Machine ---------------*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file was developed by Bruno Cardoso Lopes and is distributed under the
|
|
// University of Illinois Open Source License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Target-independent interfaces which we are implementing
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
include "../Target.td"
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Register File Description
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
include "MipsRegisterInfo.td"
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Subtarget features
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
// TODO: dummy, needed to compile
|
|
def FeatureCIX : SubtargetFeature<"r3000", "isR3000", "true",
|
|
"Enable r3000 extentions">;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Instruction Description
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
include "MipsInstrInfo.td"
|
|
|
|
def MipsInstrInfo : InstrInfo {
|
|
// Define how we want to layout our target-specific information field.
|
|
let TSFlagsFields = [];
|
|
let TSFlagsShifts = [];
|
|
}
|
|
//===----------------------------------------------------------------------===//
|
|
// Calling Conventions
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
include "MipsCallingConv.td"
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Mips processors supported.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
class Proc<string Name, list<SubtargetFeature> Features>
|
|
: Processor<Name, NoItineraries, Features>;
|
|
|
|
def : Proc<"generic", []>;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Declare the target which we are implementing
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
def Mips : Target {
|
|
// Pull in Instruction Info:
|
|
let InstructionSet = MipsInstrInfo;
|
|
}
|