mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
28a24ca471
ANDS does not use the same encoding scheme as other xxxS instructions (e.g., ADDS). Take that into account to avoid wrong peephole optimization. <rdar://problem/16693089> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207020 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: llc %s -o - | FileCheck %s
|
|
; Check that ANDS (tst) is not merged with ADD when the immediate
|
|
; is not 0.
|
|
; <rdar://problem/16693089>
|
|
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
|
target triple = "arm64-apple-ios"
|
|
|
|
; CHECK-LABEL: tst1:
|
|
; CHECK: add [[REG:w[0-9]+]], w{{[0-9]+}}, #1
|
|
; CHECK: tst [[REG]], #0x1
|
|
define void @tst1() {
|
|
entry:
|
|
br i1 undef, label %for.end, label %for.body
|
|
|
|
for.body: ; preds = %for.body, %entry
|
|
%result.09 = phi i32 [ %add2.result.0, %for.body ], [ 1, %entry ]
|
|
%i.08 = phi i32 [ %inc, %for.body ], [ 2, %entry ]
|
|
%and = and i32 %i.08, 1
|
|
%cmp1 = icmp eq i32 %and, 0
|
|
%add2.result.0 = select i1 %cmp1, i32 undef, i32 %result.09
|
|
%inc = add nsw i32 %i.08, 1
|
|
%cmp = icmp slt i32 %i.08, undef
|
|
br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
|
|
|
|
for.cond.for.end_crit_edge: ; preds = %for.body
|
|
%add2.result.0.lcssa = phi i32 [ %add2.result.0, %for.body ]
|
|
br label %for.end
|
|
|
|
for.end: ; preds = %for.cond.for.end_crit_edge, %entry
|
|
ret void
|
|
}
|