Tom Stellard 42faffddb9 R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are used ... DS instructions that access local memory can only uses addresses that are less than or equal to the value of M0. When M0 is uninitialized, then we experience undefined behavior. This patch also changes the behavior to emit S_WQM_B64 on pixel shaders no matter what kind of DS instruction is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201097 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-10 16:58:30 +00:00
..
AArch64	[AArch64]Implement the copy of two FPR8 registers by using FMOVss of two FPR32 registers in copyPhysReg.	2014-02-10 03:16:22 +00:00
ARM	ARM: use natural LLVM IR for vshll instructions	2014-02-10 16:20:29 +00:00
CPP
Generic	[DAG] Don't pull the binary operation though the shift if the operands have opaque constants.	2014-02-06 04:09:06 +00:00
Hexagon	DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0}	2014-02-04 01:23:52 +00:00
Inputs
Mips	[mips][msa] Add DLSA instruction.	2014-02-10 12:05:17 +00:00
MSP430
NVPTX	[NVPTX] Fix emitting aggregate parameters	2014-01-28 18:35:29 +00:00
PowerPC	Fix a bug with .weak_def_can_be_hidden: Mutable variables cannot use it.	2014-02-07 16:21:30 +00:00
R600	R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are used	2014-02-10 16:58:30 +00:00
SPARC	[Sparc] Emit relocations for Thread Local Storage (TLS) when integrated assembler is used.	2014-02-07 05:54:20 +00:00
SystemZ
Thumb
Thumb2	Remove -arm-disable-ehabi option	2014-02-07 20:12:49 +00:00
X86	Test commit - added a new line to vec_shuf-insert.ll.	2014-02-10 12:42:13 +00:00
XCore