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The buildbots are still not satisfied. MIPS and ARM are failing (even though at least MIPS was expected to pass). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237245 91177308-0d34-0410-b5e6-96231b3b80d8
328 lines
9.7 KiB
C++
328 lines
9.7 KiB
C++
//===- SubtargetFeature.cpp - CPU characteristics Implementation ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the SubtargetFeature interface.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/SubtargetFeature.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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#include <cassert>
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#include <cctype>
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#include <cstdlib>
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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// Static Helper Functions
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//===----------------------------------------------------------------------===//
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/// hasFlag - Determine if a feature has a flag; '+' or '-'
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///
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static inline bool hasFlag(StringRef Feature) {
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assert(!Feature.empty() && "Empty string");
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// Get first character
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char Ch = Feature[0];
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// Check if first character is '+' or '-' flag
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return Ch == '+' || Ch =='-';
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}
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/// StripFlag - Return string stripped of flag.
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///
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static inline std::string StripFlag(StringRef Feature) {
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return hasFlag(Feature) ? Feature.substr(1) : Feature;
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}
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/// isEnabled - Return true if enable flag; '+'.
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///
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static inline bool isEnabled(StringRef Feature) {
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assert(!Feature.empty() && "Empty string");
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// Get first character
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char Ch = Feature[0];
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// Check if first character is '+' for enabled
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return Ch == '+';
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}
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/// Split - Splits a string of comma separated items in to a vector of strings.
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///
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static void Split(std::vector<std::string> &V, StringRef S) {
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SmallVector<StringRef, 3> Tmp;
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S.split(Tmp, ",", -1, false /* KeepEmpty */);
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V.assign(Tmp.begin(), Tmp.end());
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}
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/// Join a vector of strings to a string with a comma separating each element.
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///
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static std::string Join(const std::vector<std::string> &V) {
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// Start with empty string.
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std::string Result;
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// If the vector is not empty
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if (!V.empty()) {
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// Start with the first feature
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Result = V[0];
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// For each successive feature
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for (size_t i = 1; i < V.size(); i++) {
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// Add a comma
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Result += ",";
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// Add the feature
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Result += V[i];
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}
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}
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// Return the features string
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return Result;
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}
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/// Adding features.
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void SubtargetFeatures::AddFeature(StringRef String, bool Enable) {
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// Don't add empty features.
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if (!String.empty())
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// Convert to lowercase, prepend flag if we don't already have a flag.
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Features.push_back(hasFlag(String) ? String.lower()
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: (Enable ? "+" : "-") + String.lower());
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}
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/// Find KV in array using binary search.
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static const SubtargetFeatureKV *Find(StringRef S,
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ArrayRef<SubtargetFeatureKV> A) {
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// Binary search the array
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auto F = std::lower_bound(A.begin(), A.end(), S);
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// If not found then return NULL
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if (F == A.end() || StringRef(F->Key) != S) return nullptr;
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// Return the found array item
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return F;
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}
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/// getLongestEntryLength - Return the length of the longest entry in the table.
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///
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static size_t getLongestEntryLength(ArrayRef<SubtargetFeatureKV> Table) {
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size_t MaxLen = 0;
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for (auto &I : Table)
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MaxLen = std::max(MaxLen, std::strlen(I.Key));
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return MaxLen;
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}
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/// Display help for feature choices.
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///
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static void Help(ArrayRef<SubtargetFeatureKV> CPUTable,
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ArrayRef<SubtargetFeatureKV> FeatTable) {
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// Determine the length of the longest CPU and Feature entries.
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unsigned MaxCPULen = getLongestEntryLength(CPUTable);
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unsigned MaxFeatLen = getLongestEntryLength(FeatTable);
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// Print the CPU table.
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errs() << "Available CPUs for this target:\n\n";
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for (auto &CPU : CPUTable)
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errs() << format(" %-*s - %s.\n", MaxCPULen, CPU.Key, CPU.Desc);
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errs() << '\n';
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// Print the Feature table.
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errs() << "Available features for this target:\n\n";
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for (auto &Feature : FeatTable)
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errs() << format(" %-*s - %s.\n", MaxFeatLen, Feature.Key, Feature.Desc);
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errs() << '\n';
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errs() << "Use +feature to enable a feature, or -feature to disable it.\n"
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"For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
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}
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//===----------------------------------------------------------------------===//
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// SubtargetFeatures Implementation
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//===----------------------------------------------------------------------===//
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SubtargetFeatures::SubtargetFeatures(StringRef Initial) {
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// Break up string into separate features
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Split(Features, Initial);
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}
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std::string SubtargetFeatures::getString() const {
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return Join(Features);
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}
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/// SetImpliedBits - For each feature that is (transitively) implied by this
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/// feature, set it.
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///
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static
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void SetImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry,
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ArrayRef<SubtargetFeatureKV> FeatureTable) {
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for (auto &FE : FeatureTable) {
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if (FeatureEntry->Value == FE.Value) continue;
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if (FeatureEntry->Implies & FE.Value) {
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Bits |= FE.Value;
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SetImpliedBits(Bits, &FE, FeatureTable);
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}
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}
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}
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/// ClearImpliedBits - For each feature that (transitively) implies this
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/// feature, clear it.
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///
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static
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void ClearImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry,
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ArrayRef<SubtargetFeatureKV> FeatureTable) {
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for (auto &FE : FeatureTable) {
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if (FeatureEntry->Value == FE.Value) continue;
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if (FE.Implies & FeatureEntry->Value) {
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Bits &= ~FE.Value;
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ClearImpliedBits(Bits, &FE, FeatureTable);
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}
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}
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}
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/// ToggleFeature - Toggle a feature and returns the newly updated feature
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/// bits.
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uint64_t
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SubtargetFeatures::ToggleFeature(uint64_t Bits, StringRef Feature,
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ArrayRef<SubtargetFeatureKV> FeatureTable) {
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// Find feature in table.
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const SubtargetFeatureKV *FeatureEntry =
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Find(StripFlag(Feature), FeatureTable);
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// If there is a match
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if (FeatureEntry) {
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if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) {
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Bits &= ~FeatureEntry->Value;
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// For each feature that implies this, clear it.
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ClearImpliedBits(Bits, FeatureEntry, FeatureTable);
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} else {
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Bits |= FeatureEntry->Value;
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// For each feature that this implies, set it.
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SetImpliedBits(Bits, FeatureEntry, FeatureTable);
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}
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} else {
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errs() << "'" << Feature
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<< "' is not a recognized feature for this target"
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<< " (ignoring feature)\n";
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}
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return Bits;
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}
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/// getFeatureBits - Get feature bits a CPU.
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///
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uint64_t
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SubtargetFeatures::getFeatureBits(StringRef CPU,
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ArrayRef<SubtargetFeatureKV> CPUTable,
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ArrayRef<SubtargetFeatureKV> FeatureTable) {
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if (CPUTable.empty() || FeatureTable.empty())
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return 0;
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#ifndef NDEBUG
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for (size_t i = 1, e = CPUTable.size(); i != e; ++i) {
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assert(strcmp(CPUTable[i - 1].Key, CPUTable[i].Key) < 0 &&
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"CPU table is not sorted");
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}
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for (size_t i = 1, e = FeatureTable.size(); i != e; ++i) {
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assert(strcmp(FeatureTable[i - 1].Key, FeatureTable[i].Key) < 0 &&
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"CPU features table is not sorted");
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}
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#endif
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uint64_t Bits = 0; // Resulting bits
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// Check if help is needed
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if (CPU == "help")
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Help(CPUTable, FeatureTable);
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// Find CPU entry if CPU name is specified.
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else if (!CPU.empty()) {
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const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable);
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// If there is a match
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if (CPUEntry) {
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// Set base feature bits
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Bits = CPUEntry->Value;
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// Set the feature implied by this CPU feature, if any.
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for (auto &FE : FeatureTable) {
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if (CPUEntry->Value & FE.Value)
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SetImpliedBits(Bits, &FE, FeatureTable);
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}
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} else {
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errs() << "'" << CPU
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<< "' is not a recognized processor for this target"
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<< " (ignoring processor)\n";
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}
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}
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// Iterate through each feature
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for (auto &Feature : Features) {
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// Check for help
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if (Feature == "+help")
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Help(CPUTable, FeatureTable);
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// Find feature in table.
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const SubtargetFeatureKV *FeatureEntry =
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Find(StripFlag(Feature), FeatureTable);
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// If there is a match
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if (FeatureEntry) {
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// Enable/disable feature in bits
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if (isEnabled(Feature)) {
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Bits |= FeatureEntry->Value;
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// For each feature that this implies, set it.
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SetImpliedBits(Bits, FeatureEntry, FeatureTable);
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} else {
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Bits &= ~FeatureEntry->Value;
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// For each feature that implies this, clear it.
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ClearImpliedBits(Bits, FeatureEntry, FeatureTable);
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}
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} else {
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errs() << "'" << Feature
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<< "' is not a recognized feature for this target"
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<< " (ignoring feature)\n";
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}
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}
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return Bits;
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}
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/// print - Print feature string.
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///
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void SubtargetFeatures::print(raw_ostream &OS) const {
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for (auto &F : Features)
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OS << F << " ";
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OS << "\n";
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}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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/// dump - Dump feature info.
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///
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void SubtargetFeatures::dump() const {
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print(dbgs());
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}
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#endif
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/// Adds the default features for the specified target triple.
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///
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/// FIXME: This is an inelegant way of specifying the features of a
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/// subtarget. It would be better if we could encode this information
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/// into the IR. See <rdar://5972456>.
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///
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void SubtargetFeatures::getDefaultSubtargetFeatures(const Triple& Triple) {
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if (Triple.getVendor() == Triple::Apple) {
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if (Triple.getArch() == Triple::ppc) {
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// powerpc-apple-*
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AddFeature("altivec");
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} else if (Triple.getArch() == Triple::ppc64) {
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// powerpc64-apple-*
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AddFeature("64bit");
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AddFeature("altivec");
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}
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}
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}
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