Chandler Carruth 4363b0729b [x86] Teach the target-specific combining how to aggressively fold ... half-shuffles, even looking through intervening instructions in a chain. Summary: This doesn't happen to show up with any test cases I've found for the current shuffle lowering, but previous attempts would benefit from this and it seems generally useful. I've tested it directly using intrinsics, which also shows that it will work with hand vectorized code as well. Note that even though pshufd isn't directly used in these tests, it gets exercised because we combine some of the half shuffles into a pshufd first, and then merge them. Differential Revision: http://reviews.llvm.org/D4291 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211890 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-27 11:34:40 +00:00
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AArch64	MachineScheduler: add some book-keeping to fix an assert.	2014-06-27 04:57:05 +00:00
ARM	Fix up scoping in a few tests (and delete one that validates unnecessary behavior).	2014-06-24 20:10:27 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Print a=b as an assignment.	2014-06-24 22:45:16 +00:00
MSP430
NVPTX	Canonicalize addrspacecast ConstExpr between different pointer types	2014-06-15 21:40:57 +00:00
PowerPC	Rename loop unrolling and loop vectorizer metadata to have a common prefix.	2014-06-25 15:41:00 +00:00
R600	R600: Add some testcases for promote alloca pass.	2014-06-27 03:55:55 +00:00
SPARC
SystemZ
Thumb
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	[x86] Teach the target-specific combining how to aggressively fold	2014-06-27 11:34:40 +00:00
XCore